diff --git a/.cproject b/.cproject new file mode 100644 index 0000000..55b04d9 --- /dev/null +++ b/.cproject @@ -0,0 +1,17 @@ + + + + + + + + + + + + + + + + + \ No newline at end of file diff --git a/.gitmodules b/.gitmodules deleted file mode 100644 index 4ae20a8..0000000 --- a/.gitmodules +++ /dev/null @@ -1,3 +0,0 @@ -[submodule "components/opus/opus"] - path = components/opus/opus - url = https://github.com/xiph/opus diff --git a/.project b/.project new file mode 100644 index 0000000..b932aad --- /dev/null +++ b/.project @@ -0,0 +1,20 @@ + + + snapclient + + + + + + org.eclipse.cdt.core.cBuilder + clean,full,incremental, + + + + + + org.eclipse.cdt.core.cnature + org.eclipse.cdt.core.ccnature + com.espressif.idf.core.idfNature + + diff --git a/LICENSE b/LICENSE new file mode 100644 index 0000000..17fb21c --- /dev/null +++ b/LICENSE @@ -0,0 +1,5 @@ +Code in this repository is in the Public Domain (or CC0 licensed, at your option.) + +Unless required by applicable law or agreed to in writing, this +software is distributed on an "AS IS" BASIS, WITHOUT WARRANTIES OR +CONDITIONS OF ANY KIND, either express or implied. diff --git a/Makefile b/Makefile deleted file mode 100644 index 550d67e..0000000 --- a/Makefile +++ /dev/null @@ -1,9 +0,0 @@ -# -# This is a project Makefile. It is assumed the directory this Makefile resides in is a -# project subdirectory. -# - -PROJECT_NAME := snapclient - -include $(IDF_PATH)/make/project.mk - diff --git a/components/MerusAudio/CMakeLists.txt b/components/MerusAudio/CMakeLists.txt deleted file mode 100644 index 42647d6..0000000 --- a/components/MerusAudio/CMakeLists.txt +++ /dev/null @@ -1,2 +0,0 @@ -idf_component_register(SRCS "MerusAudio.c" - INCLUDE_DIRS "include") diff --git a/components/MerusAudio/Kconfig.projbuild b/components/MerusAudio/Kconfig.projbuild deleted file mode 100644 index 4484080..0000000 --- a/components/MerusAudio/Kconfig.projbuild +++ /dev/null @@ -1,52 +0,0 @@ -menu "Merus MA120x0 interface Configuration" - config MA120X0_NENABLE_PIN - int "Master enable/disable for ma120x0" - default 16 - help - GPIO number to control enable/disable. - - config MA120X0_NMUTE_PIN - int "Master mute/unmute for ma120x0" - default 2 - help - GPIO number to controm mute/unmute. - - config MA120X0_ENABLE_PIN - int "Master enable/disable for ma120x0" - default 16 - help - GPIO number to control enable/disable. - - config MA120X0_NERR_PIN - int "NERR monitor pin" - default 21 - help - GPIO number to monitor NERROR. - - config MA120X0_NCLIP_PIN - int "Clip indication pin" - default 22 - help - GPIO number low if clip observed - - - config MA120X0_SCL_PIN - int "I2C_SCL clock GPIO" - default 0 - help - GPIO number to use for I2C clock. - - config MA120X0_SDA_PIN - int "I2C_SDA data GPIO" - default 4 - help - GPIO number to use for I2C data. - - config MA120X0_I2C_ADDR - hex "I2C ADDR" - default 0x20 - help - Address for ma120x0. - - -endmenu diff --git a/components/MerusAudio/MerusAudio.c b/components/MerusAudio/MerusAudio.c deleted file mode 100644 index aed9d8f..0000000 --- a/components/MerusAudio/MerusAudio.c +++ /dev/null @@ -1,432 +0,0 @@ -// -// MA120x0P ESP32 Driver -// -// Merus Audio - September 2018 -// Written by Joergen Kragh Jakobsen, jkj@myrun.dk -// -// Register interface thrugh I2C for MA12070P and MA12040P -// Support a single amplifier/i2c address -// -// - -#include -#include -#include "esp_log.h" -#include "driver/i2c.h" - -#include "MerusAudio.h" - -#include "ma120x0.h" -//#include "ma120_rev1_all.h" - - -#define MA_NENABLE_IO CONFIG_MA120X0_NENABLE_PIN -#define MA_ENABLE_IO CONFIG_MA120X0_ENABLE_PIN -#define MA_NMUTE_IO CONFIG_MA120X0_NMUTE_PIN -#define MA_NERR_IO CONFIG_MA120X0_NERR_PIN -#define MA_NCLIP_IO CONFIG_MA120X0_NCLIP_PIN - - -static const char* I2C_TAG = "i2c"; -#define I2C_CHECK(a, str, ret) if(!(a)) { \ - ESP_LOGE(I2C_TAG,"%s:%d (%s):%s", __FILE__, __LINE__, __FUNCTION__, str); \ - return (ret); \ - } - - -#define I2C_MASTER_SCL_IO CONFIG_MA120X0_SCL_PIN //4 /*!< gpio number for I2C master clock */ -#define I2C_MASTER_SDA_IO CONFIG_MA120X0_SDA_PIN //0 - /*!< gpio number for I2C master data */ -#define I2C_MASTER_NUM I2C_NUM_0 - /*!< I2C port number for master dev */ -#define I2C_MASTER_TX_BUF_DISABLE 0 /*!< I2C master do not need buffer */ -#define I2C_MASTER_RX_BUF_DISABLE 0 /*!< I2C master do not need buffer */ -#define I2C_MASTER_FREQ_HZ 100000 /*!< I2C master clock frequency */ - -#define MA120X0_ADDR CONFIG_MA120X0_I2C_ADDR /*!< slave address for MA120X0 amplifier */ - -#define WRITE_BIT I2C_MASTER_WRITE /*!< I2C master write */ -#define READ_BIT I2C_MASTER_READ /*!< I2C master read */ -#define ACK_CHECK_EN 0x1 /*!< I2C master will check ack from slave*/ -#define ACK_CHECK_DIS 0x0 /*!< I2C master will not check ack from slave */ -#define ACK_VAL 0x0 /*!< I2C ack value */ -#define NACK_VAL 0x1 /*!< I2C nack value */ - - -void setup_ma120x0() -{ // Setup control pins nEnable and nMute - gpio_config_t io_conf; - - io_conf.intr_type = GPIO_PIN_INTR_DISABLE; - io_conf.mode = GPIO_MODE_OUTPUT; - io_conf.pin_bit_mask = (1ULL< GEN2 ,",addr); - //printf("Scan i2c address 0x%02x read address 0 : 0x%02x \n", addr ,res); - } - printf("\n"); - uint8_t rxbuf[32]; - uint8_t otp[1024]; - for (uint8_t i=0;i<16; i++) - { ma_read(0x20,2,0x8000+i*32,rxbuf,32); - //printf("%04x : ",0x8000+i*32 ); - for (uint8_t j=0; j<32 ; j++ ) - { otp[i*32+j] = rxbuf[j]; - } - } - for (uint16_t i=0;i<16*32; i++) - { if (i%32==0) { - printf("\n0x%04x : ",0x8000+i); - } - printf("%02x ",otp[i]); - } - res = ma_write_byte(0x20,2,0x060c,0); - res = ma_read_byte(0x20,2,0x060c); - printf("\nHardware version: 0x%02x\n",res); - - printf("\n"); -} -uint8_t b[32]; -#define CHECK(ADDR,L) ma_read(0x20,2,ADDR,b,L); printf("Check 0x%04x :",ADDR); for (int ci=0;ci>8), ACK_VAL); - i2c_master_write_byte(cmd, (uint8_t)(address&0x00ff), ACK_VAL); - } else - { - i2c_master_write_byte(cmd, (uint8_t) address, ACK_VAL); - } - - for (int i=0 ; i>8), ACK_VAL); - i2c_master_write_byte(cmd, (uint8_t)(address&0x00ff), ACK_VAL); - } else - { - i2c_master_write_byte(cmd, (uint8_t) address, ACK_VAL); - } - i2c_master_write_byte(cmd, value, ACK_VAL); - i2c_master_stop(cmd); - ret = i2c_master_cmd_begin(I2C_MASTER_NUM, cmd, 1000 / portTICK_RATE_MS); - i2c_cmd_link_delete(cmd); - if (ret == ESP_FAIL) { - printf("ESP_I2C_WRITE ERROR : %d\n",ret); - return ret; - } - return ESP_OK; -} - -esp_err_t ma_read(uint8_t i2c_addr, uint8_t prot, uint16_t address, uint8_t *rbuf, uint8_t n) -{ esp_err_t ret; - i2c_cmd_handle_t cmd = i2c_cmd_link_create(); - if (cmd == NULL ) { printf("ERROR handle null\n"); } - i2c_master_start(cmd); - i2c_master_write_byte(cmd, (i2c_addr<<1) | WRITE_BIT, ACK_CHECK_EN); - if (prot == 2) { - i2c_master_write_byte(cmd, (uint8_t)((address&0xff00)>>8), ACK_VAL); - i2c_master_write_byte(cmd, (uint8_t)(address&0x00ff), ACK_VAL); - } else - { - i2c_master_write_byte(cmd, (uint8_t) address, ACK_VAL); - } - i2c_master_start(cmd); - i2c_master_write_byte(cmd, (i2c_addr<<1) | READ_BIT, ACK_CHECK_EN); - - i2c_master_read(cmd, rbuf, n-1 ,ACK_VAL); - // for (uint8_t i = 0;i>8), ACK_VAL); - i2c_master_write_byte(cmd, (uint8_t)(address&0x00ff), ACK_VAL); - } else - { - i2c_master_write_byte(cmd, (uint8_t) address, ACK_VAL); - } - i2c_master_start(cmd); // Repeated start - i2c_master_write_byte(cmd, (i2c_addr<<1) | READ_BIT, ACK_CHECK_EN); - i2c_master_read_byte(cmd, &value, NACK_VAL); - i2c_master_stop(cmd); - ret = i2c_master_cmd_begin(I2C_MASTER_NUM, cmd, 1000 / portTICK_RATE_MS); - i2c_cmd_link_delete(cmd); - if (ret == ESP_FAIL) { - printf("i2c Error read - readback\n"); - return ESP_FAIL; - } - - return value; -} diff --git a/components/MerusAudio/component.mk b/components/MerusAudio/component.mk deleted file mode 100644 index bae802c..0000000 --- a/components/MerusAudio/component.mk +++ /dev/null @@ -1,12 +0,0 @@ -# -# Main Makefile. This is basically the same as a component makefile. -# -# This Makefile should, at the very least, just include $(SDK_PATH)/make/component_common.mk. By default, -# this will take the sources in the src/ directory, compile them and link them into -# lib(subdirectory_name).a in the build directory. This behaviour is entirely configurable, -# please read the ESP-IDF documents if you need to do this. -# - -COMPONENT_SRCDIRS := . -# CFLAGS += - diff --git a/components/MerusAudio/include/MerusAudio.h b/components/MerusAudio/include/MerusAudio.h deleted file mode 100644 index 84c3348..0000000 --- a/components/MerusAudio/include/MerusAudio.h +++ /dev/null @@ -1,20 +0,0 @@ -#ifndef _MERUSAUDIO_H_ -#define _MERUSAUDIO_H_ - -void setup_ma120x0(void); -void setup_ma120(void); -void ma120_read_error(uint8_t i2c_addr); -void ma120_setup_audio(uint8_t i2c_addr); - -void i2c_master_init(void); - -esp_err_t ma_write_byte(uint8_t i2c_addr, uint8_t prot, uint16_t address, uint8_t value); -esp_err_t ma_write(uint8_t i2c_addr, uint8_t prot, uint16_t address, uint8_t *wbuf, uint8_t n); - -uint8_t ma_read_byte(uint8_t i2c_addr, uint8_t prot, uint16_t address); -esp_err_t ma_read(uint8_t i2c_addr, uint8_t prot, uint16_t address, uint8_t *rbuf, uint8_t n); - - -#endif /* _MERUSAUDIO_H_ */ - - diff --git a/components/MerusAudio/include/ma120x0.h b/components/MerusAudio/include/ma120x0.h deleted file mode 100644 index 5809f21..0000000 --- a/components/MerusAudio/include/ma120x0.h +++ /dev/null @@ -1,1226 +0,0 @@ -/*---------------------------------------------------------------------------------------*/ -/* Merus Audio MA120x0 register map */ -/* */ -/* Provides : Defines for registers and symbols in merus audio amplifiers */ -/* Macros for set and get content of symbols */ -/* Read-modify-write on write to symbols less then 8 bits */ -/* */ -/* Symbols is a collection of 1 to 8 bits within a single address */ -/* */ -/* Provided as is - free to use and share */ -/* */ -/* Timestamp : Thu Feb 23 23:06:51 2017 */ -/* Created from database : ma12070_register_spec_rev6_1 */ -/* Errors and updates please contact: Jorgen Kragh Jakobsen, jkj@merus-audio.com */ -/*---------------------------------------------------------------------------------------*/ - -#include - - -#ifndef _MA120X0_H_ -#define _MA120X0_H_ - - -//------------------------------------------------------------------------------manualPM--- -// Select Manual PowerMode control -#define MA_manualPM__a 0 -#define MA_manualPM__len 1 -#define MA_manualPM__mask 0x40 -#define MA_manualPM__shift 0x06 -#define MA_manualPM__reset 0x00 -#define set_obj_MA_manualPM(o,y) ({ uint8_t __ret = o.read(0); o.write(0,(__ret&0xbf)|((y<<6)&0x40)); }) -#define set_MA_manualPM(y) ({ uint8_t __ret = ma_read_byte(0); ma_write_byte(0,(__ret&0xbf)|((y<<6)&0x40)); }) -#define get_obj_MA_manualPM(o) (o.read(0) & 0x40)>>6 -#define get_MA_manualPM() ( ma_read_byte(0) & 0x40)>>6 -//------------------------------------------------------------------------------PM_man--- -// Manual selected power mode -#define MA_PM_man__a 0 -#define MA_PM_man__len 2 -#define MA_PM_man__mask 0x30 -#define MA_PM_man__shift 0x04 -#define MA_PM_man__reset 0x03 -#define set_obj_MA_PM_man(o,y) ({ uint8_t __ret = o.read(0); o.write(0,(__ret&0xcf)|((y<<4)&0x30)); }) -#define set_MA_PM_man(y) ({ uint8_t __ret = ma_read_byte(0); ma_write_byte(0,(__ret&0xcf)|((y<<4)&0x30)); }) -#define get_obj_MA_PM_man(o) (o.read(0) & 0x30)>>4 -#define get_MA_PM_man() ( ma_read_byte(0) & 0x30)>>4 -//------------------------------------------------------------------------------Mthr_1to2--- -// Mod. index threshold value for PM1=>PM2 change. -#define MA_Mthr_1to2__a 1 -#define MA_Mthr_1to2__len 8 -#define MA_Mthr_1to2__mask 0xff -#define MA_Mthr_1to2__shift 0x00 -#define MA_Mthr_1to2__reset 0x3c -#define set_obj_MA_Mthr_1to2(o,y) o.write(1,y); -#define set_MA_Mthr_1to2(y) ma_write_byte(1,y); -#define get_obj_MA_Mthr_1to2(o) (o.read(1) & 0xff)>>0 -#define get_MA_Mthr_1to2() ( ma_read_byte(1) & 0xff)>>0 -//------------------------------------------------------------------------------Mthr_2to1--- -// Mod. index threshold value for PM2=>PM1 change. -#define MA_Mthr_2to1__a 2 -#define MA_Mthr_2to1__len 8 -#define MA_Mthr_2to1__mask 0xff -#define MA_Mthr_2to1__shift 0x00 -#define MA_Mthr_2to1__reset 0x32 -#define set_obj_MA_Mthr_2to1(o,y) o.write(2,y); -#define set_MA_Mthr_2to1(y) ma_write_byte(2,y); -#define get_obj_MA_Mthr_2to1(o) (o.read(2) & 0xff)>>0 -#define get_MA_Mthr_2to1() ( ma_read_byte(2) & 0xff)>>0 -//------------------------------------------------------------------------------Mthr_2to3--- -// Mod. index threshold value for PM2=>PM3 change. -#define MA_Mthr_2to3__a 3 -#define MA_Mthr_2to3__len 8 -#define MA_Mthr_2to3__mask 0xff -#define MA_Mthr_2to3__shift 0x00 -#define MA_Mthr_2to3__reset 0x5a -#define set_obj_MA_Mthr_2to3(o,y) o.write(3,y); -#define set_MA_Mthr_2to3(y) ma_write_byte(3,y); -#define get_obj_MA_Mthr_2to3(o) (o.read(3) & 0xff)>>0 -#define get_MA_Mthr_2to3() ( ma_read_byte(3) & 0xff)>>0 -//------------------------------------------------------------------------------Mthr_3to2--- -// Mod. index threshold value for PM3=>PM2 change. -#define MA_Mthr_3to2__a 4 -#define MA_Mthr_3to2__len 8 -#define MA_Mthr_3to2__mask 0xff -#define MA_Mthr_3to2__shift 0x00 -#define MA_Mthr_3to2__reset 0x50 -#define set_obj_MA_Mthr_3to2(o,y) o.write(4,y); -#define set_MA_Mthr_3to2(y) ma_write_byte(4,y); -#define get_obj_MA_Mthr_3to2(o) (o.read(4) & 0xff)>>0 -#define get_MA_Mthr_3to2() ( ma_read_byte(4) & 0xff)>>0 -//------------------------------------------------------------------------------pwmClkDiv_nom--- -// PWM default clock divider value -#define MA_pwmClkDiv_nom__a 8 -#define MA_pwmClkDiv_nom__len 8 -#define MA_pwmClkDiv_nom__mask 0xff -#define MA_pwmClkDiv_nom__shift 0x00 -#define MA_pwmClkDiv_nom__reset 0x26 -#define set_obj_MA_pwmClkDiv_nom(o,y) o.write(8,y); -#define set_MA_pwmClkDiv_nom(y) ma_write_byte(8,y); -#define get_obj_MA_pwmClkDiv_nom(o) (o.read(8) & 0xff)>>0 -#define get_MA_pwmClkDiv_nom() ( ma_read_byte(8) & 0xff)>>0 -//------------------------------------------------------------------------------ocp_latch_en--- -// High to use permanently latching level-2 OCP -#define MA_ocp_latch_en__a 10 -#define MA_ocp_latch_en__len 1 -#define MA_ocp_latch_en__mask 0x02 -#define MA_ocp_latch_en__shift 0x01 -#define MA_ocp_latch_en__reset 0x00 -#define set_obj_MA_ocp_latch_en(o,y) ({ uint8_t __ret = o.read(10); o.write(10,(__ret&0xfd)|((y<<1)&0x02)); }) -#define set_MA_ocp_latch_en(y) ({ uint8_t __ret = ma_read_byte(10); ma_write_byte(10,(__ret&0xfd)|((y<<1)&0x02)); }) -#define get_obj_MA_ocp_latch_en(o) (o.read(10) & 0x02)>>1 -#define get_MA_ocp_latch_en() ( ma_read_byte(10) & 0x02)>>1 -//------------------------------------------------------------------------------lf_clamp_en--- -// High (default) to enable LF int2+3 clamping on clip -#define MA_lf_clamp_en__a 10 -#define MA_lf_clamp_en__len 1 -#define MA_lf_clamp_en__mask 0x80 -#define MA_lf_clamp_en__shift 0x07 -#define MA_lf_clamp_en__reset 0x00 -#define set_obj_MA_lf_clamp_en(o,y) ({ uint8_t __ret = o.read(10); o.write(10,(__ret&0x7f)|((y<<7)&0x80)); }) -#define set_MA_lf_clamp_en(y) ({ uint8_t __ret = ma_read_byte(10); ma_write_byte(10,(__ret&0x7f)|((y<<7)&0x80)); }) -#define get_obj_MA_lf_clamp_en(o) (o.read(10) & 0x80)>>7 -#define get_MA_lf_clamp_en() ( ma_read_byte(10) & 0x80)>>7 -//------------------------------------------------------------------------------PMcfg_BTL_B.modType--- -// -#define MA_PMcfg_BTL_B__modType__a 18 -#define MA_PMcfg_BTL_B__modType__len 2 -#define MA_PMcfg_BTL_B__modType__mask 0x18 -#define MA_PMcfg_BTL_B__modType__shift 0x03 -#define MA_PMcfg_BTL_B__modType__reset 0x02 -#define set_obj_MA_PMcfg_BTL_B__modType(o,y) ({ uint8_t __ret = o.read(18); o.write(18,(__ret&0xe7)|((y<<3)&0x18)); }) -#define set_MA_PMcfg_BTL_B__modType(y) ({ uint8_t __ret = ma_read_byte(18); ma_write_byte(18,(__ret&0xe7)|((y<<3)&0x18)); }) -#define get_obj_MA_PMcfg_BTL_B__modType(o) (o.read(18) & 0x18)>>3 -#define get_MA_PMcfg_BTL_B__modType() ( ma_read_byte(18) & 0x18)>>3 -//------------------------------------------------------------------------------PMcfg_BTL_B.freqDiv--- -// -#define MA_PMcfg_BTL_B__freqDiv__a 18 -#define MA_PMcfg_BTL_B__freqDiv__len 2 -#define MA_PMcfg_BTL_B__freqDiv__mask 0x06 -#define MA_PMcfg_BTL_B__freqDiv__shift 0x01 -#define MA_PMcfg_BTL_B__freqDiv__reset 0x01 -#define set_obj_MA_PMcfg_BTL_B__freqDiv(o,y) ({ uint8_t __ret = o.read(18); o.write(18,(__ret&0xf9)|((y<<1)&0x06)); }) -#define set_MA_PMcfg_BTL_B__freqDiv(y) ({ uint8_t __ret = ma_read_byte(18); ma_write_byte(18,(__ret&0xf9)|((y<<1)&0x06)); }) -#define get_obj_MA_PMcfg_BTL_B__freqDiv(o) (o.read(18) & 0x06)>>1 -#define get_MA_PMcfg_BTL_B__freqDiv() ( ma_read_byte(18) & 0x06)>>1 -//------------------------------------------------------------------------------PMcfg_BTL_B.lf_gain_ol--- -// -#define MA_PMcfg_BTL_B__lf_gain_ol__a 18 -#define MA_PMcfg_BTL_B__lf_gain_ol__len 1 -#define MA_PMcfg_BTL_B__lf_gain_ol__mask 0x01 -#define MA_PMcfg_BTL_B__lf_gain_ol__shift 0x00 -#define MA_PMcfg_BTL_B__lf_gain_ol__reset 0x01 -#define set_obj_MA_PMcfg_BTL_B__lf_gain_ol(o,y) ({ uint8_t __ret = o.read(18); o.write(18,(__ret&0xfe)|((y<<0)&0x01)); }) -#define set_MA_PMcfg_BTL_B__lf_gain_ol(y) ({ uint8_t __ret = ma_read_byte(18); ma_write_byte(18,(__ret&0xfe)|((y<<0)&0x01)); }) -#define get_obj_MA_PMcfg_BTL_B__lf_gain_ol(o) (o.read(18) & 0x01)>>0 -#define get_MA_PMcfg_BTL_B__lf_gain_ol() ( ma_read_byte(18) & 0x01)>>0 -//------------------------------------------------------------------------------PMcfg_BTL_C.freqDiv--- -// -#define MA_PMcfg_BTL_C__freqDiv__a 19 -#define MA_PMcfg_BTL_C__freqDiv__len 2 -#define MA_PMcfg_BTL_C__freqDiv__mask 0x06 -#define MA_PMcfg_BTL_C__freqDiv__shift 0x01 -#define MA_PMcfg_BTL_C__freqDiv__reset 0x01 -#define set_obj_MA_PMcfg_BTL_C__freqDiv(o,y) ({ uint8_t __ret = o.read(19); o.write(19,(__ret&0xf9)|((y<<1)&0x06)); }) -#define set_MA_PMcfg_BTL_C__freqDiv(y) ({ uint8_t __ret = ma_read_byte(19); ma_write_byte(19,(__ret&0xf9)|((y<<1)&0x06)); }) -#define get_obj_MA_PMcfg_BTL_C__freqDiv(o) (o.read(19) & 0x06)>>1 -#define get_MA_PMcfg_BTL_C__freqDiv() ( ma_read_byte(19) & 0x06)>>1 -//------------------------------------------------------------------------------PMcfg_BTL_C.modType--- -// -#define MA_PMcfg_BTL_C__modType__a 19 -#define MA_PMcfg_BTL_C__modType__len 2 -#define MA_PMcfg_BTL_C__modType__mask 0x18 -#define MA_PMcfg_BTL_C__modType__shift 0x03 -#define MA_PMcfg_BTL_C__modType__reset 0x01 -#define set_obj_MA_PMcfg_BTL_C__modType(o,y) ({ uint8_t __ret = o.read(19); o.write(19,(__ret&0xe7)|((y<<3)&0x18)); }) -#define set_MA_PMcfg_BTL_C__modType(y) ({ uint8_t __ret = ma_read_byte(19); ma_write_byte(19,(__ret&0xe7)|((y<<3)&0x18)); }) -#define get_obj_MA_PMcfg_BTL_C__modType(o) (o.read(19) & 0x18)>>3 -#define get_MA_PMcfg_BTL_C__modType() ( ma_read_byte(19) & 0x18)>>3 -//------------------------------------------------------------------------------PMcfg_BTL_C.lf_gain_ol--- -// -#define MA_PMcfg_BTL_C__lf_gain_ol__a 19 -#define MA_PMcfg_BTL_C__lf_gain_ol__len 1 -#define MA_PMcfg_BTL_C__lf_gain_ol__mask 0x01 -#define MA_PMcfg_BTL_C__lf_gain_ol__shift 0x00 -#define MA_PMcfg_BTL_C__lf_gain_ol__reset 0x00 -#define set_obj_MA_PMcfg_BTL_C__lf_gain_ol(o,y) ({ uint8_t __ret = o.read(19); o.write(19,(__ret&0xfe)|((y<<0)&0x01)); }) -#define set_MA_PMcfg_BTL_C__lf_gain_ol(y) ({ uint8_t __ret = ma_read_byte(19); ma_write_byte(19,(__ret&0xfe)|((y<<0)&0x01)); }) -#define get_obj_MA_PMcfg_BTL_C__lf_gain_ol(o) (o.read(19) & 0x01)>>0 -#define get_MA_PMcfg_BTL_C__lf_gain_ol() ( ma_read_byte(19) & 0x01)>>0 -//------------------------------------------------------------------------------PMcfg_BTL_D.modType--- -// -#define MA_PMcfg_BTL_D__modType__a 20 -#define MA_PMcfg_BTL_D__modType__len 2 -#define MA_PMcfg_BTL_D__modType__mask 0x18 -#define MA_PMcfg_BTL_D__modType__shift 0x03 -#define MA_PMcfg_BTL_D__modType__reset 0x02 -#define set_obj_MA_PMcfg_BTL_D__modType(o,y) ({ uint8_t __ret = o.read(20); o.write(20,(__ret&0xe7)|((y<<3)&0x18)); }) -#define set_MA_PMcfg_BTL_D__modType(y) ({ uint8_t __ret = ma_read_byte(20); ma_write_byte(20,(__ret&0xe7)|((y<<3)&0x18)); }) -#define get_obj_MA_PMcfg_BTL_D__modType(o) (o.read(20) & 0x18)>>3 -#define get_MA_PMcfg_BTL_D__modType() ( ma_read_byte(20) & 0x18)>>3 -//------------------------------------------------------------------------------PMcfg_BTL_D.freqDiv--- -// -#define MA_PMcfg_BTL_D__freqDiv__a 20 -#define MA_PMcfg_BTL_D__freqDiv__len 2 -#define MA_PMcfg_BTL_D__freqDiv__mask 0x06 -#define MA_PMcfg_BTL_D__freqDiv__shift 0x01 -#define MA_PMcfg_BTL_D__freqDiv__reset 0x02 -#define set_obj_MA_PMcfg_BTL_D__freqDiv(o,y) ({ uint8_t __ret = o.read(20); o.write(20,(__ret&0xf9)|((y<<1)&0x06)); }) -#define set_MA_PMcfg_BTL_D__freqDiv(y) ({ uint8_t __ret = ma_read_byte(20); ma_write_byte(20,(__ret&0xf9)|((y<<1)&0x06)); }) -#define get_obj_MA_PMcfg_BTL_D__freqDiv(o) (o.read(20) & 0x06)>>1 -#define get_MA_PMcfg_BTL_D__freqDiv() ( ma_read_byte(20) & 0x06)>>1 -//------------------------------------------------------------------------------PMcfg_BTL_D.lf_gain_ol--- -// -#define MA_PMcfg_BTL_D__lf_gain_ol__a 20 -#define MA_PMcfg_BTL_D__lf_gain_ol__len 1 -#define MA_PMcfg_BTL_D__lf_gain_ol__mask 0x01 -#define MA_PMcfg_BTL_D__lf_gain_ol__shift 0x00 -#define MA_PMcfg_BTL_D__lf_gain_ol__reset 0x00 -#define set_obj_MA_PMcfg_BTL_D__lf_gain_ol(o,y) ({ uint8_t __ret = o.read(20); o.write(20,(__ret&0xfe)|((y<<0)&0x01)); }) -#define set_MA_PMcfg_BTL_D__lf_gain_ol(y) ({ uint8_t __ret = ma_read_byte(20); ma_write_byte(20,(__ret&0xfe)|((y<<0)&0x01)); }) -#define get_obj_MA_PMcfg_BTL_D__lf_gain_ol(o) (o.read(20) & 0x01)>>0 -#define get_MA_PMcfg_BTL_D__lf_gain_ol() ( ma_read_byte(20) & 0x01)>>0 -//------------------------------------------------------------------------------PMcfg_SE_A.modType--- -// -#define MA_PMcfg_SE_A__modType__a 21 -#define MA_PMcfg_SE_A__modType__len 2 -#define MA_PMcfg_SE_A__modType__mask 0x18 -#define MA_PMcfg_SE_A__modType__shift 0x03 -#define MA_PMcfg_SE_A__modType__reset 0x01 -#define set_obj_MA_PMcfg_SE_A__modType(o,y) ({ uint8_t __ret = o.read(21); o.write(21,(__ret&0xe7)|((y<<3)&0x18)); }) -#define set_MA_PMcfg_SE_A__modType(y) ({ uint8_t __ret = ma_read_byte(21); ma_write_byte(21,(__ret&0xe7)|((y<<3)&0x18)); }) -#define get_obj_MA_PMcfg_SE_A__modType(o) (o.read(21) & 0x18)>>3 -#define get_MA_PMcfg_SE_A__modType() ( ma_read_byte(21) & 0x18)>>3 -//------------------------------------------------------------------------------PMcfg_SE_A.freqDiv--- -// -#define MA_PMcfg_SE_A__freqDiv__a 21 -#define MA_PMcfg_SE_A__freqDiv__len 2 -#define MA_PMcfg_SE_A__freqDiv__mask 0x06 -#define MA_PMcfg_SE_A__freqDiv__shift 0x01 -#define MA_PMcfg_SE_A__freqDiv__reset 0x00 -#define set_obj_MA_PMcfg_SE_A__freqDiv(o,y) ({ uint8_t __ret = o.read(21); o.write(21,(__ret&0xf9)|((y<<1)&0x06)); }) -#define set_MA_PMcfg_SE_A__freqDiv(y) ({ uint8_t __ret = ma_read_byte(21); ma_write_byte(21,(__ret&0xf9)|((y<<1)&0x06)); }) -#define get_obj_MA_PMcfg_SE_A__freqDiv(o) (o.read(21) & 0x06)>>1 -#define get_MA_PMcfg_SE_A__freqDiv() ( ma_read_byte(21) & 0x06)>>1 -//------------------------------------------------------------------------------PMcfg_SE_A.lf_gain_ol--- -// -#define MA_PMcfg_SE_A__lf_gain_ol__a 21 -#define MA_PMcfg_SE_A__lf_gain_ol__len 1 -#define MA_PMcfg_SE_A__lf_gain_ol__mask 0x01 -#define MA_PMcfg_SE_A__lf_gain_ol__shift 0x00 -#define MA_PMcfg_SE_A__lf_gain_ol__reset 0x01 -#define set_obj_MA_PMcfg_SE_A__lf_gain_ol(o,y) ({ uint8_t __ret = o.read(21); o.write(21,(__ret&0xfe)|((y<<0)&0x01)); }) -#define set_MA_PMcfg_SE_A__lf_gain_ol(y) ({ uint8_t __ret = ma_read_byte(21); ma_write_byte(21,(__ret&0xfe)|((y<<0)&0x01)); }) -#define get_obj_MA_PMcfg_SE_A__lf_gain_ol(o) (o.read(21) & 0x01)>>0 -#define get_MA_PMcfg_SE_A__lf_gain_ol() ( ma_read_byte(21) & 0x01)>>0 -//------------------------------------------------------------------------------PMcfg_SE_B.lf_gain_ol--- -// -#define MA_PMcfg_SE_B__lf_gain_ol__a 22 -#define MA_PMcfg_SE_B__lf_gain_ol__len 1 -#define MA_PMcfg_SE_B__lf_gain_ol__mask 0x01 -#define MA_PMcfg_SE_B__lf_gain_ol__shift 0x00 -#define MA_PMcfg_SE_B__lf_gain_ol__reset 0x00 -#define set_obj_MA_PMcfg_SE_B__lf_gain_ol(o,y) ({ uint8_t __ret = o.read(22); o.write(22,(__ret&0xfe)|((y<<0)&0x01)); }) -#define set_MA_PMcfg_SE_B__lf_gain_ol(y) ({ uint8_t __ret = ma_read_byte(22); ma_write_byte(22,(__ret&0xfe)|((y<<0)&0x01)); }) -#define get_obj_MA_PMcfg_SE_B__lf_gain_ol(o) (o.read(22) & 0x01)>>0 -#define get_MA_PMcfg_SE_B__lf_gain_ol() ( ma_read_byte(22) & 0x01)>>0 -//------------------------------------------------------------------------------PMcfg_SE_B.freqDiv--- -// -#define MA_PMcfg_SE_B__freqDiv__a 22 -#define MA_PMcfg_SE_B__freqDiv__len 2 -#define MA_PMcfg_SE_B__freqDiv__mask 0x06 -#define MA_PMcfg_SE_B__freqDiv__shift 0x01 -#define MA_PMcfg_SE_B__freqDiv__reset 0x01 -#define set_obj_MA_PMcfg_SE_B__freqDiv(o,y) ({ uint8_t __ret = o.read(22); o.write(22,(__ret&0xf9)|((y<<1)&0x06)); }) -#define set_MA_PMcfg_SE_B__freqDiv(y) ({ uint8_t __ret = ma_read_byte(22); ma_write_byte(22,(__ret&0xf9)|((y<<1)&0x06)); }) -#define get_obj_MA_PMcfg_SE_B__freqDiv(o) (o.read(22) & 0x06)>>1 -#define get_MA_PMcfg_SE_B__freqDiv() ( ma_read_byte(22) & 0x06)>>1 -//------------------------------------------------------------------------------PMcfg_SE_B.modType--- -// -#define MA_PMcfg_SE_B__modType__a 22 -#define MA_PMcfg_SE_B__modType__len 2 -#define MA_PMcfg_SE_B__modType__mask 0x18 -#define MA_PMcfg_SE_B__modType__shift 0x03 -#define MA_PMcfg_SE_B__modType__reset 0x01 -#define set_obj_MA_PMcfg_SE_B__modType(o,y) ({ uint8_t __ret = o.read(22); o.write(22,(__ret&0xe7)|((y<<3)&0x18)); }) -#define set_MA_PMcfg_SE_B__modType(y) ({ uint8_t __ret = ma_read_byte(22); ma_write_byte(22,(__ret&0xe7)|((y<<3)&0x18)); }) -#define get_obj_MA_PMcfg_SE_B__modType(o) (o.read(22) & 0x18)>>3 -#define get_MA_PMcfg_SE_B__modType() ( ma_read_byte(22) & 0x18)>>3 -//------------------------------------------------------------------------------balWaitCount_PM1--- -// PM1 balancing period. -#define MA_balWaitCount_PM1__a 23 -#define MA_balWaitCount_PM1__len 8 -#define MA_balWaitCount_PM1__mask 0xff -#define MA_balWaitCount_PM1__shift 0x00 -#define MA_balWaitCount_PM1__reset 0x14 -#define set_obj_MA_balWaitCount_PM1(o,y) o.write(23,y); -#define set_MA_balWaitCount_PM1(y) ma_write_byte(23,y); -#define get_obj_MA_balWaitCount_PM1(o) (o.read(23) & 0xff)>>0 -#define get_MA_balWaitCount_PM1() ( ma_read_byte(23) & 0xff)>>0 -//------------------------------------------------------------------------------balWaitCount_PM2--- -// PM2 balancing period. -#define MA_balWaitCount_PM2__a 24 -#define MA_balWaitCount_PM2__len 8 -#define MA_balWaitCount_PM2__mask 0xff -#define MA_balWaitCount_PM2__shift 0x00 -#define MA_balWaitCount_PM2__reset 0x14 -#define set_obj_MA_balWaitCount_PM2(o,y) o.write(24,y); -#define set_MA_balWaitCount_PM2(y) ma_write_byte(24,y); -#define get_obj_MA_balWaitCount_PM2(o) (o.read(24) & 0xff)>>0 -#define get_MA_balWaitCount_PM2() ( ma_read_byte(24) & 0xff)>>0 -//------------------------------------------------------------------------------balWaitCount_PM3--- -// PM3 balancing period. -#define MA_balWaitCount_PM3__a 25 -#define MA_balWaitCount_PM3__len 8 -#define MA_balWaitCount_PM3__mask 0xff -#define MA_balWaitCount_PM3__shift 0x00 -#define MA_balWaitCount_PM3__reset 0x1a -#define set_obj_MA_balWaitCount_PM3(o,y) o.write(25,y); -#define set_MA_balWaitCount_PM3(y) ma_write_byte(25,y); -#define get_obj_MA_balWaitCount_PM3(o) (o.read(25) & 0xff)>>0 -#define get_MA_balWaitCount_PM3() ( ma_read_byte(25) & 0xff)>>0 -//------------------------------------------------------------------------------useSpread_PM1--- -// PM1 PWM spread-spectrum mode on/off. -#define MA_useSpread_PM1__a 26 -#define MA_useSpread_PM1__len 1 -#define MA_useSpread_PM1__mask 0x40 -#define MA_useSpread_PM1__shift 0x06 -#define MA_useSpread_PM1__reset 0x00 -#define set_obj_MA_useSpread_PM1(o,y) ({ uint8_t __ret = o.read(26); o.write(26,(__ret&0xbf)|((y<<6)&0x40)); }) -#define set_MA_useSpread_PM1(y) ({ uint8_t __ret = ma_read_byte(26); ma_write_byte(26,(__ret&0xbf)|((y<<6)&0x40)); }) -#define get_obj_MA_useSpread_PM1(o) (o.read(26) & 0x40)>>6 -#define get_MA_useSpread_PM1() ( ma_read_byte(26) & 0x40)>>6 -//------------------------------------------------------------------------------DTsteps_PM1--- -// PM1 dead time setting [10ns steps]. -#define MA_DTsteps_PM1__a 26 -#define MA_DTsteps_PM1__len 3 -#define MA_DTsteps_PM1__mask 0x38 -#define MA_DTsteps_PM1__shift 0x03 -#define MA_DTsteps_PM1__reset 0x04 -#define set_obj_MA_DTsteps_PM1(o,y) ({ uint8_t __ret = o.read(26); o.write(26,(__ret&0xc7)|((y<<3)&0x38)); }) -#define set_MA_DTsteps_PM1(y) ({ uint8_t __ret = ma_read_byte(26); ma_write_byte(26,(__ret&0xc7)|((y<<3)&0x38)); }) -#define get_obj_MA_DTsteps_PM1(o) (o.read(26) & 0x38)>>3 -#define get_MA_DTsteps_PM1() ( ma_read_byte(26) & 0x38)>>3 -//------------------------------------------------------------------------------balType_PM1--- -// PM1 balancing sensor scheme. -#define MA_balType_PM1__a 26 -#define MA_balType_PM1__len 3 -#define MA_balType_PM1__mask 0x07 -#define MA_balType_PM1__shift 0x00 -#define MA_balType_PM1__reset 0x00 -#define set_obj_MA_balType_PM1(o,y) ({ uint8_t __ret = o.read(26); o.write(26,(__ret&0xf8)|((y<<0)&0x07)); }) -#define set_MA_balType_PM1(y) ({ uint8_t __ret = ma_read_byte(26); ma_write_byte(26,(__ret&0xf8)|((y<<0)&0x07)); }) -#define get_obj_MA_balType_PM1(o) (o.read(26) & 0x07)>>0 -#define get_MA_balType_PM1() ( ma_read_byte(26) & 0x07)>>0 -//------------------------------------------------------------------------------useSpread_PM2--- -// PM2 PWM spread-spectrum mode on/off. -#define MA_useSpread_PM2__a 27 -#define MA_useSpread_PM2__len 1 -#define MA_useSpread_PM2__mask 0x40 -#define MA_useSpread_PM2__shift 0x06 -#define MA_useSpread_PM2__reset 0x00 -#define set_obj_MA_useSpread_PM2(o,y) ({ uint8_t __ret = o.read(27); o.write(27,(__ret&0xbf)|((y<<6)&0x40)); }) -#define set_MA_useSpread_PM2(y) ({ uint8_t __ret = ma_read_byte(27); ma_write_byte(27,(__ret&0xbf)|((y<<6)&0x40)); }) -#define get_obj_MA_useSpread_PM2(o) (o.read(27) & 0x40)>>6 -#define get_MA_useSpread_PM2() ( ma_read_byte(27) & 0x40)>>6 -//------------------------------------------------------------------------------DTsteps_PM2--- -// PM2 dead time setting [10ns steps]. -#define MA_DTsteps_PM2__a 27 -#define MA_DTsteps_PM2__len 3 -#define MA_DTsteps_PM2__mask 0x38 -#define MA_DTsteps_PM2__shift 0x03 -#define MA_DTsteps_PM2__reset 0x03 -#define set_obj_MA_DTsteps_PM2(o,y) ({ uint8_t __ret = o.read(27); o.write(27,(__ret&0xc7)|((y<<3)&0x38)); }) -#define set_MA_DTsteps_PM2(y) ({ uint8_t __ret = ma_read_byte(27); ma_write_byte(27,(__ret&0xc7)|((y<<3)&0x38)); }) -#define get_obj_MA_DTsteps_PM2(o) (o.read(27) & 0x38)>>3 -#define get_MA_DTsteps_PM2() ( ma_read_byte(27) & 0x38)>>3 -//------------------------------------------------------------------------------balType_PM2--- -// PM2 balancing sensor scheme. -#define MA_balType_PM2__a 27 -#define MA_balType_PM2__len 3 -#define MA_balType_PM2__mask 0x07 -#define MA_balType_PM2__shift 0x00 -#define MA_balType_PM2__reset 0x01 -#define set_obj_MA_balType_PM2(o,y) ({ uint8_t __ret = o.read(27); o.write(27,(__ret&0xf8)|((y<<0)&0x07)); }) -#define set_MA_balType_PM2(y) ({ uint8_t __ret = ma_read_byte(27); ma_write_byte(27,(__ret&0xf8)|((y<<0)&0x07)); }) -#define get_obj_MA_balType_PM2(o) (o.read(27) & 0x07)>>0 -#define get_MA_balType_PM2() ( ma_read_byte(27) & 0x07)>>0 -//------------------------------------------------------------------------------useSpread_PM3--- -// PM3 PWM spread-spectrum mode on/off. -#define MA_useSpread_PM3__a 28 -#define MA_useSpread_PM3__len 1 -#define MA_useSpread_PM3__mask 0x40 -#define MA_useSpread_PM3__shift 0x06 -#define MA_useSpread_PM3__reset 0x00 -#define set_obj_MA_useSpread_PM3(o,y) ({ uint8_t __ret = o.read(28); o.write(28,(__ret&0xbf)|((y<<6)&0x40)); }) -#define set_MA_useSpread_PM3(y) ({ uint8_t __ret = ma_read_byte(28); ma_write_byte(28,(__ret&0xbf)|((y<<6)&0x40)); }) -#define get_obj_MA_useSpread_PM3(o) (o.read(28) & 0x40)>>6 -#define get_MA_useSpread_PM3() ( ma_read_byte(28) & 0x40)>>6 -//------------------------------------------------------------------------------DTsteps_PM3--- -// PM3 dead time setting [10ns steps]. -#define MA_DTsteps_PM3__a 28 -#define MA_DTsteps_PM3__len 3 -#define MA_DTsteps_PM3__mask 0x38 -#define MA_DTsteps_PM3__shift 0x03 -#define MA_DTsteps_PM3__reset 0x01 -#define set_obj_MA_DTsteps_PM3(o,y) ({ uint8_t __ret = o.read(28); o.write(28,(__ret&0xc7)|((y<<3)&0x38)); }) -#define set_MA_DTsteps_PM3(y) ({ uint8_t __ret = ma_read_byte(28); ma_write_byte(28,(__ret&0xc7)|((y<<3)&0x38)); }) -#define get_obj_MA_DTsteps_PM3(o) (o.read(28) & 0x38)>>3 -#define get_MA_DTsteps_PM3() ( ma_read_byte(28) & 0x38)>>3 -//------------------------------------------------------------------------------balType_PM3--- -// PM3 balancing sensor scheme. -#define MA_balType_PM3__a 28 -#define MA_balType_PM3__len 3 -#define MA_balType_PM3__mask 0x07 -#define MA_balType_PM3__shift 0x00 -#define MA_balType_PM3__reset 0x03 -#define set_obj_MA_balType_PM3(o,y) ({ uint8_t __ret = o.read(28); o.write(28,(__ret&0xf8)|((y<<0)&0x07)); }) -#define set_MA_balType_PM3(y) ({ uint8_t __ret = ma_read_byte(28); ma_write_byte(28,(__ret&0xf8)|((y<<0)&0x07)); }) -#define get_obj_MA_balType_PM3(o) (o.read(28) & 0x07)>>0 -#define get_MA_balType_PM3() ( ma_read_byte(28) & 0x07)>>0 -//------------------------------------------------------------------------------PMprofile--- -// PM profile select. Valid presets: 0-1-2-3-4. 5=> custom profile. -#define MA_PMprofile__a 29 -#define MA_PMprofile__len 3 -#define MA_PMprofile__mask 0x07 -#define MA_PMprofile__shift 0x00 -#define MA_PMprofile__reset 0x00 -#define set_obj_MA_PMprofile(o,y) ({ uint8_t __ret = o.read(29); o.write(29,(__ret&0xf8)|((y<<0)&0x07)); }) -#define set_MA_PMprofile(y) ({ uint8_t __ret = ma_read_byte(29); ma_write_byte(29,(__ret&0xf8)|((y<<0)&0x07)); }) -#define get_obj_MA_PMprofile(o) (o.read(29) & 0x07)>>0 -#define get_MA_PMprofile() ( ma_read_byte(29) & 0x07)>>0 -//------------------------------------------------------------------------------PM3_man--- -// Custom profile PM3 contents. 0=>A, 1=>B, 2=>C, 3=>D -#define MA_PM3_man__a 30 -#define MA_PM3_man__len 2 -#define MA_PM3_man__mask 0x30 -#define MA_PM3_man__shift 0x04 -#define MA_PM3_man__reset 0x02 -#define set_obj_MA_PM3_man(o,y) ({ uint8_t __ret = o.read(30); o.write(30,(__ret&0xcf)|((y<<4)&0x30)); }) -#define set_MA_PM3_man(y) ({ uint8_t __ret = ma_read_byte(30); ma_write_byte(30,(__ret&0xcf)|((y<<4)&0x30)); }) -#define get_obj_MA_PM3_man(o) (o.read(30) & 0x30)>>4 -#define get_MA_PM3_man() ( ma_read_byte(30) & 0x30)>>4 -//------------------------------------------------------------------------------PM2_man--- -// Custom profile PM2 contents. 0=>A, 1=>B, 2=>C, 3=>D -#define MA_PM2_man__a 30 -#define MA_PM2_man__len 2 -#define MA_PM2_man__mask 0x0c -#define MA_PM2_man__shift 0x02 -#define MA_PM2_man__reset 0x03 -#define set_obj_MA_PM2_man(o,y) ({ uint8_t __ret = o.read(30); o.write(30,(__ret&0xf3)|((y<<2)&0x0c)); }) -#define set_MA_PM2_man(y) ({ uint8_t __ret = ma_read_byte(30); ma_write_byte(30,(__ret&0xf3)|((y<<2)&0x0c)); }) -#define get_obj_MA_PM2_man(o) (o.read(30) & 0x0c)>>2 -#define get_MA_PM2_man() ( ma_read_byte(30) & 0x0c)>>2 -//------------------------------------------------------------------------------PM1_man--- -// Custom profile PM1 contents. 0=>A, 1=>B, 2=>C, 3=>D -#define MA_PM1_man__a 30 -#define MA_PM1_man__len 2 -#define MA_PM1_man__mask 0x03 -#define MA_PM1_man__shift 0x00 -#define MA_PM1_man__reset 0x03 -#define set_obj_MA_PM1_man(o,y) ({ uint8_t __ret = o.read(30); o.write(30,(__ret&0xfc)|((y<<0)&0x03)); }) -#define set_MA_PM1_man(y) ({ uint8_t __ret = ma_read_byte(30); ma_write_byte(30,(__ret&0xfc)|((y<<0)&0x03)); }) -#define get_obj_MA_PM1_man(o) (o.read(30) & 0x03)>>0 -#define get_MA_PM1_man() ( ma_read_byte(30) & 0x03)>>0 -//------------------------------------------------------------------------------ocp_latch_clear--- -// Low-high clears current OCP latched condition. -#define MA_ocp_latch_clear__a 32 -#define MA_ocp_latch_clear__len 1 -#define MA_ocp_latch_clear__mask 0x80 -#define MA_ocp_latch_clear__shift 0x07 -#define MA_ocp_latch_clear__reset 0x00 -#define set_obj_MA_ocp_latch_clear(o,y) ({ uint8_t __ret = o.read(32); o.write(32,(__ret&0x7f)|((y<<7)&0x80)); }) -#define set_MA_ocp_latch_clear(y) ({ uint8_t __ret = ma_read_byte(32); ma_write_byte(32,(__ret&0x7f)|((y<<7)&0x80)); }) -#define get_obj_MA_ocp_latch_clear(o) (o.read(32) & 0x80)>>7 -#define get_MA_ocp_latch_clear() ( ma_read_byte(32) & 0x80)>>7 -//------------------------------------------------------------------------------audio_in_mode--- -// Audio input mode; 0-1-2-3-4-5 -#define MA_audio_in_mode__a 37 -#define MA_audio_in_mode__len 3 -#define MA_audio_in_mode__mask 0xe0 -#define MA_audio_in_mode__shift 0x05 -#define MA_audio_in_mode__reset 0x00 -#define set_obj_MA_audio_in_mode(o,y) ({ uint8_t __ret = o.read(37); o.write(37,(__ret&0x1f)|((y<<5)&0xe0)); }) -#define set_MA_audio_in_mode(y) ({ uint8_t __ret = ma_read_byte(37); ma_write_byte(37,(__ret&0x1f)|((y<<5)&0xe0)); }) -#define get_obj_MA_audio_in_mode(o) (o.read(37) & 0xe0)>>5 -#define get_MA_audio_in_mode() ( ma_read_byte(37) & 0xe0)>>5 -//------------------------------------------------------------------------------eh_dcShdn--- -// High to enable DC protection -#define MA_eh_dcShdn__a 38 -#define MA_eh_dcShdn__len 1 -#define MA_eh_dcShdn__mask 0x04 -#define MA_eh_dcShdn__shift 0x02 -#define MA_eh_dcShdn__reset 0x01 -#define set_obj_MA_eh_dcShdn(o,y) ({ uint8_t __ret = o.read(38); o.write(38,(__ret&0xfb)|((y<<2)&0x04)); }) -#define set_MA_eh_dcShdn(y) ({ uint8_t __ret = ma_read_byte(38); ma_write_byte(38,(__ret&0xfb)|((y<<2)&0x04)); }) -#define get_obj_MA_eh_dcShdn(o) (o.read(38) & 0x04)>>2 -#define get_MA_eh_dcShdn() ( ma_read_byte(38) & 0x04)>>2 -//------------------------------------------------------------------------------audio_in_mode_ext--- -// If set, audio_in_mode is controlled from audio_in_mode register. If not set audio_in_mode is set from fuse bank setting -#define MA_audio_in_mode_ext__a 39 -#define MA_audio_in_mode_ext__len 1 -#define MA_audio_in_mode_ext__mask 0x20 -#define MA_audio_in_mode_ext__shift 0x05 -#define MA_audio_in_mode_ext__reset 0x00 -#define set_obj_MA_audio_in_mode_ext(o,y) ({ uint8_t __ret = o.read(39); o.write(39,(__ret&0xdf)|((y<<5)&0x20)); }) -#define set_MA_audio_in_mode_ext(y) ({ uint8_t __ret = ma_read_byte(39); ma_write_byte(39,(__ret&0xdf)|((y<<5)&0x20)); }) -#define get_obj_MA_audio_in_mode_ext(o) (o.read(39) & 0x20)>>5 -#define get_MA_audio_in_mode_ext() ( ma_read_byte(39) & 0x20)>>5 -//------------------------------------------------------------------------------eh_clear--- -// Flip to clear error registers -#define MA_eh_clear__a 45 -#define MA_eh_clear__len 1 -#define MA_eh_clear__mask 0x04 -#define MA_eh_clear__shift 0x02 -#define MA_eh_clear__reset 0x00 -#define set_obj_MA_eh_clear(o,y) ({ uint8_t __ret = o.read(45); o.write(45,(__ret&0xfb)|((y<<2)&0x04)); }) -#define set_MA_eh_clear(y) ({ uint8_t __ret = ma_read_byte(45); ma_write_byte(45,(__ret&0xfb)|((y<<2)&0x04)); }) -#define get_obj_MA_eh_clear(o) (o.read(45) & 0x04)>>2 -#define get_MA_eh_clear() ( ma_read_byte(45) & 0x04)>>2 -//------------------------------------------------------------------------------thermal_compr_en--- -// Enable otw-contr. input compression? -#define MA_thermal_compr_en__a 45 -#define MA_thermal_compr_en__len 1 -#define MA_thermal_compr_en__mask 0x20 -#define MA_thermal_compr_en__shift 0x05 -#define MA_thermal_compr_en__reset 0x01 -#define set_obj_MA_thermal_compr_en(o,y) ({ uint8_t __ret = o.read(45); o.write(45,(__ret&0xdf)|((y<<5)&0x20)); }) -#define set_MA_thermal_compr_en(y) ({ uint8_t __ret = ma_read_byte(45); ma_write_byte(45,(__ret&0xdf)|((y<<5)&0x20)); }) -#define get_obj_MA_thermal_compr_en(o) (o.read(45) & 0x20)>>5 -#define get_MA_thermal_compr_en() ( ma_read_byte(45) & 0x20)>>5 -//------------------------------------------------------------------------------system_mute--- -// 1 = mute system, 0 = normal operation -#define MA_system_mute__a 45 -#define MA_system_mute__len 1 -#define MA_system_mute__mask 0x40 -#define MA_system_mute__shift 0x06 -#define MA_system_mute__reset 0x00 -#define set_obj_MA_system_mute(o,y) ({ uint8_t __ret = o.read(45); o.write(45,(__ret&0xbf)|((y<<6)&0x40)); }) -#define set_MA_system_mute(y) ({ uint8_t __ret = ma_read_byte(45); ma_write_byte(45,(__ret&0xbf)|((y<<6)&0x40)); }) -#define get_obj_MA_system_mute(o) (o.read(45) & 0x40)>>6 -#define get_MA_system_mute() ( ma_read_byte(45) & 0x40)>>6 -//------------------------------------------------------------------------------thermal_compr_max_db--- -// Audio limiter max thermal reduction -#define MA_thermal_compr_max_db__a 46 -#define MA_thermal_compr_max_db__len 3 -#define MA_thermal_compr_max_db__mask 0x07 -#define MA_thermal_compr_max_db__shift 0x00 -#define MA_thermal_compr_max_db__reset 0x04 -#define set_obj_MA_thermal_compr_max_db(o,y) ({ uint8_t __ret = o.read(46); o.write(46,(__ret&0xf8)|((y<<0)&0x07)); }) -#define set_MA_thermal_compr_max_db(y) ({ uint8_t __ret = ma_read_byte(46); ma_write_byte(46,(__ret&0xf8)|((y<<0)&0x07)); }) -#define get_obj_MA_thermal_compr_max_db(o) (o.read(46) & 0x07)>>0 -#define get_MA_thermal_compr_max_db() ( ma_read_byte(46) & 0x07)>>0 -//------------------------------------------------------------------------------audio_proc_enable--- -// Enable Audio proc, bypass if not enabled -#define MA_audio_proc_enable__a 53 -#define MA_audio_proc_enable__len 1 -#define MA_audio_proc_enable__mask 0x08 -#define MA_audio_proc_enable__shift 0x03 -#define MA_audio_proc_enable__reset 0x00 -#define set_obj_MA_audio_proc_enable(o,y) ({ uint8_t __ret = o.read(53); o.write(53,(__ret&0xf7)|((y<<3)&0x08)); }) -#define set_MA_audio_proc_enable(y) ({ uint8_t __ret = ma_read_byte(53); ma_write_byte(53,(__ret&0xf7)|((y<<3)&0x08)); }) -#define get_obj_MA_audio_proc_enable(o) (o.read(53) & 0x08)>>3 -#define get_MA_audio_proc_enable() ( ma_read_byte(53) & 0x08)>>3 -//------------------------------------------------------------------------------audio_proc_release--- -// 00:slow, 01:normal, 10:fast -#define MA_audio_proc_release__a 53 -#define MA_audio_proc_release__len 2 -#define MA_audio_proc_release__mask 0x30 -#define MA_audio_proc_release__shift 0x04 -#define MA_audio_proc_release__reset 0x00 -#define set_obj_MA_audio_proc_release(o,y) ({ uint8_t __ret = o.read(53); o.write(53,(__ret&0xcf)|((y<<4)&0x30)); }) -#define set_MA_audio_proc_release(y) ({ uint8_t __ret = ma_read_byte(53); ma_write_byte(53,(__ret&0xcf)|((y<<4)&0x30)); }) -#define get_obj_MA_audio_proc_release(o) (o.read(53) & 0x30)>>4 -#define get_MA_audio_proc_release() ( ma_read_byte(53) & 0x30)>>4 -//------------------------------------------------------------------------------audio_proc_attack--- -// 00:slow, 01:normal, 10:fast -#define MA_audio_proc_attack__a 53 -#define MA_audio_proc_attack__len 2 -#define MA_audio_proc_attack__mask 0xc0 -#define MA_audio_proc_attack__shift 0x06 -#define MA_audio_proc_attack__reset 0x00 -#define set_obj_MA_audio_proc_attack(o,y) ({ uint8_t __ret = o.read(53); o.write(53,(__ret&0x3f)|((y<<6)&0xc0)); }) -#define set_MA_audio_proc_attack(y) ({ uint8_t __ret = ma_read_byte(53); ma_write_byte(53,(__ret&0x3f)|((y<<6)&0xc0)); }) -#define get_obj_MA_audio_proc_attack(o) (o.read(53) & 0xc0)>>6 -#define get_MA_audio_proc_attack() ( ma_read_byte(53) & 0xc0)>>6 -//------------------------------------------------------------------------------i2s_format--- -// i2s basic data format, 000 = std. i2s, 001 = left justified (default) -#define MA_i2s_format__a 53 -#define MA_i2s_format__len 3 -#define MA_i2s_format__mask 0x07 -#define MA_i2s_format__shift 0x00 -#define MA_i2s_format__reset 0x01 -#define set_obj_MA_i2s_format(o,y) ({ uint8_t __ret = o.read(53); o.write(53,(__ret&0xf8)|((y<<0)&0x07)); }) -#define set_MA_i2s_format(y) ({ uint8_t __ret = ma_read_byte(53); ma_write_byte(53,(__ret&0xf8)|((y<<0)&0x07)); }) -#define get_obj_MA_i2s_format(o) (o.read(53) & 0x07)>>0 -#define get_MA_i2s_format() ( ma_read_byte(53) & 0x07)>>0 -//------------------------------------------------------------------------------audio_proc_limiterEnable--- -// 1: enable limiter, 0: disable limiter -#define MA_audio_proc_limiterEnable__a 54 -#define MA_audio_proc_limiterEnable__len 1 -#define MA_audio_proc_limiterEnable__mask 0x40 -#define MA_audio_proc_limiterEnable__shift 0x06 -#define MA_audio_proc_limiterEnable__reset 0x00 -#define set_obj_MA_audio_proc_limiterEnable(o,y) ({ uint8_t __ret = o.read(54); o.write(54,(__ret&0xbf)|((y<<6)&0x40)); }) -#define set_MA_audio_proc_limiterEnable(y) ({ uint8_t __ret = ma_read_byte(54); ma_write_byte(54,(__ret&0xbf)|((y<<6)&0x40)); }) -#define get_obj_MA_audio_proc_limiterEnable(o) (o.read(54) & 0x40)>>6 -#define get_MA_audio_proc_limiterEnable() ( ma_read_byte(54) & 0x40)>>6 -//------------------------------------------------------------------------------audio_proc_mute--- -// 1: mute, 0: unmute -#define MA_audio_proc_mute__a 54 -#define MA_audio_proc_mute__len 1 -#define MA_audio_proc_mute__mask 0x80 -#define MA_audio_proc_mute__shift 0x07 -#define MA_audio_proc_mute__reset 0x00 -#define set_obj_MA_audio_proc_mute(o,y) ({ uint8_t __ret = o.read(54); o.write(54,(__ret&0x7f)|((y<<7)&0x80)); }) -#define set_MA_audio_proc_mute(y) ({ uint8_t __ret = ma_read_byte(54); ma_write_byte(54,(__ret&0x7f)|((y<<7)&0x80)); }) -#define get_obj_MA_audio_proc_mute(o) (o.read(54) & 0x80)>>7 -#define get_MA_audio_proc_mute() ( ma_read_byte(54) & 0x80)>>7 -//------------------------------------------------------------------------------i2s_sck_pol--- -// i2s sck polarity cfg. 0 = rising edge data change -#define MA_i2s_sck_pol__a 54 -#define MA_i2s_sck_pol__len 1 -#define MA_i2s_sck_pol__mask 0x01 -#define MA_i2s_sck_pol__shift 0x00 -#define MA_i2s_sck_pol__reset 0x01 -#define set_obj_MA_i2s_sck_pol(o,y) ({ uint8_t __ret = o.read(54); o.write(54,(__ret&0xfe)|((y<<0)&0x01)); }) -#define set_MA_i2s_sck_pol(y) ({ uint8_t __ret = ma_read_byte(54); ma_write_byte(54,(__ret&0xfe)|((y<<0)&0x01)); }) -#define get_obj_MA_i2s_sck_pol(o) (o.read(54) & 0x01)>>0 -#define get_MA_i2s_sck_pol() ( ma_read_byte(54) & 0x01)>>0 -//------------------------------------------------------------------------------i2s_framesize--- -// i2s word length. 00 = 32bit, 01 = 24bit -#define MA_i2s_framesize__a 54 -#define MA_i2s_framesize__len 2 -#define MA_i2s_framesize__mask 0x18 -#define MA_i2s_framesize__shift 0x03 -#define MA_i2s_framesize__reset 0x00 -#define set_obj_MA_i2s_framesize(o,y) ({ uint8_t __ret = o.read(54); o.write(54,(__ret&0xe7)|((y<<3)&0x18)); }) -#define set_MA_i2s_framesize(y) ({ uint8_t __ret = ma_read_byte(54); ma_write_byte(54,(__ret&0xe7)|((y<<3)&0x18)); }) -#define get_obj_MA_i2s_framesize(o) (o.read(54) & 0x18)>>3 -#define get_MA_i2s_framesize() ( ma_read_byte(54) & 0x18)>>3 -//------------------------------------------------------------------------------i2s_ws_pol--- -// i2s ws polarity. 0 = low first -#define MA_i2s_ws_pol__a 54 -#define MA_i2s_ws_pol__len 1 -#define MA_i2s_ws_pol__mask 0x02 -#define MA_i2s_ws_pol__shift 0x01 -#define MA_i2s_ws_pol__reset 0x00 -#define set_obj_MA_i2s_ws_pol(o,y) ({ uint8_t __ret = o.read(54); o.write(54,(__ret&0xfd)|((y<<1)&0x02)); }) -#define set_MA_i2s_ws_pol(y) ({ uint8_t __ret = ma_read_byte(54); ma_write_byte(54,(__ret&0xfd)|((y<<1)&0x02)); }) -#define get_obj_MA_i2s_ws_pol(o) (o.read(54) & 0x02)>>1 -#define get_MA_i2s_ws_pol() ( ma_read_byte(54) & 0x02)>>1 -//------------------------------------------------------------------------------i2s_order--- -// i2s word bit order. 0 = MSB first -#define MA_i2s_order__a 54 -#define MA_i2s_order__len 1 -#define MA_i2s_order__mask 0x04 -#define MA_i2s_order__shift 0x02 -#define MA_i2s_order__reset 0x00 -#define set_obj_MA_i2s_order(o,y) ({ uint8_t __ret = o.read(54); o.write(54,(__ret&0xfb)|((y<<2)&0x04)); }) -#define set_MA_i2s_order(y) ({ uint8_t __ret = ma_read_byte(54); ma_write_byte(54,(__ret&0xfb)|((y<<2)&0x04)); }) -#define get_obj_MA_i2s_order(o) (o.read(54) & 0x04)>>2 -#define get_MA_i2s_order() ( ma_read_byte(54) & 0x04)>>2 -//------------------------------------------------------------------------------i2s_rightfirst--- -// i2s L/R word order; 0 = left first -#define MA_i2s_rightfirst__a 54 -#define MA_i2s_rightfirst__len 1 -#define MA_i2s_rightfirst__mask 0x20 -#define MA_i2s_rightfirst__shift 0x05 -#define MA_i2s_rightfirst__reset 0x00 -#define set_obj_MA_i2s_rightfirst(o,y) ({ uint8_t __ret = o.read(54); o.write(54,(__ret&0xdf)|((y<<5)&0x20)); }) -#define set_MA_i2s_rightfirst(y) ({ uint8_t __ret = ma_read_byte(54); ma_write_byte(54,(__ret&0xdf)|((y<<5)&0x20)); }) -#define get_obj_MA_i2s_rightfirst(o) (o.read(54) & 0x20)>>5 -#define get_MA_i2s_rightfirst() ( ma_read_byte(54) & 0x20)>>5 -//------------------------------------------------------------------------------vol_db_master--- -// Master volume db -#define MA_vol_db_master__a 64 -#define MA_vol_db_master__len 8 -#define MA_vol_db_master__mask 0xff -#define MA_vol_db_master__shift 0x00 -#define MA_vol_db_master__reset 0x18 -#define set_obj_MA_vol_db_master(o,y) o.write(64,y); -#define set_MA_vol_db_master(y) ma_write_byte(64,y); -#define get_obj_MA_vol_db_master(o) (o.read(64) & 0xff)>>0 -#define get_MA_vol_db_master() ( ma_read_byte(64) & 0xff)>>0 -//------------------------------------------------------------------------------vol_lsb_master--- -// Master volume lsb 1/4 steps -#define MA_vol_lsb_master__a 65 -#define MA_vol_lsb_master__len 2 -#define MA_vol_lsb_master__mask 0x03 -#define MA_vol_lsb_master__shift 0x00 -#define MA_vol_lsb_master__reset 0x00 -#define set_obj_MA_vol_lsb_master(o,y) ({ uint8_t __ret = o.read(65); o.write(65,(__ret&0xfc)|((y<<0)&0x03)); }) -#define set_MA_vol_lsb_master(y) ({ uint8_t __ret = ma_read_byte(65); ma_write_byte(65,(__ret&0xfc)|((y<<0)&0x03)); }) -#define get_obj_MA_vol_lsb_master(o) (o.read(65) & 0x03)>>0 -#define get_MA_vol_lsb_master() ( ma_read_byte(65) & 0x03)>>0 -//------------------------------------------------------------------------------vol_db_ch0--- -// Volume channel 0 -#define MA_vol_db_ch0__a 66 -#define MA_vol_db_ch0__len 8 -#define MA_vol_db_ch0__mask 0xff -#define MA_vol_db_ch0__shift 0x00 -#define MA_vol_db_ch0__reset 0x18 -#define set_obj_MA_vol_db_ch0(o,y) o.write(66,y); -#define set_MA_vol_db_ch0(y) ma_write_byte(66,y); -#define get_obj_MA_vol_db_ch0(o) (o.read(66) & 0xff)>>0 -#define get_MA_vol_db_ch0() ( ma_read_byte(66) & 0xff)>>0 -//------------------------------------------------------------------------------vol_db_ch1--- -// Volume channel 1 -#define MA_vol_db_ch1__a 67 -#define MA_vol_db_ch1__len 8 -#define MA_vol_db_ch1__mask 0xff -#define MA_vol_db_ch1__shift 0x00 -#define MA_vol_db_ch1__reset 0x18 -#define set_obj_MA_vol_db_ch1(o,y) o.write(67,y); -#define set_MA_vol_db_ch1(y) ma_write_byte(67,y); -#define get_obj_MA_vol_db_ch1(o) (o.read(67) & 0xff)>>0 -#define get_MA_vol_db_ch1() ( ma_read_byte(67) & 0xff)>>0 -//------------------------------------------------------------------------------vol_db_ch2--- -// Volume channel 2 -#define MA_vol_db_ch2__a 68 -#define MA_vol_db_ch2__len 8 -#define MA_vol_db_ch2__mask 0xff -#define MA_vol_db_ch2__shift 0x00 -#define MA_vol_db_ch2__reset 0x18 -#define set_obj_MA_vol_db_ch2(o,y) o.write(68,y); -#define set_MA_vol_db_ch2(y) ma_write_byte(68,y); -#define get_obj_MA_vol_db_ch2(o) (o.read(68) & 0xff)>>0 -#define get_MA_vol_db_ch2() ( ma_read_byte(68) & 0xff)>>0 -//------------------------------------------------------------------------------vol_db_ch3--- -// Volume channel 3 -#define MA_vol_db_ch3__a 69 -#define MA_vol_db_ch3__len 8 -#define MA_vol_db_ch3__mask 0xff -#define MA_vol_db_ch3__shift 0x00 -#define MA_vol_db_ch3__reset 0x18 -#define set_obj_MA_vol_db_ch3(o,y) o.write(69,y); -#define set_MA_vol_db_ch3(y) ma_write_byte(69,y); -#define get_obj_MA_vol_db_ch3(o) (o.read(69) & 0xff)>>0 -#define get_MA_vol_db_ch3() ( ma_read_byte(69) & 0xff)>>0 -//------------------------------------------------------------------------------vol_lsb_ch0--- -// volume channel 1 - 1/4 steps -#define MA_vol_lsb_ch0__a 70 -#define MA_vol_lsb_ch0__len 2 -#define MA_vol_lsb_ch0__mask 0x03 -#define MA_vol_lsb_ch0__shift 0x00 -#define MA_vol_lsb_ch0__reset 0x00 -#define set_obj_MA_vol_lsb_ch0(o,y) ({ uint8_t __ret = o.read(70); o.write(70,(__ret&0xfc)|((y<<0)&0x03)); }) -#define set_MA_vol_lsb_ch0(y) ({ uint8_t __ret = ma_read_byte(70); ma_write_byte(70,(__ret&0xfc)|((y<<0)&0x03)); }) -#define get_obj_MA_vol_lsb_ch0(o) (o.read(70) & 0x03)>>0 -#define get_MA_vol_lsb_ch0() ( ma_read_byte(70) & 0x03)>>0 -//------------------------------------------------------------------------------vol_lsb_ch1--- -// volume channel 3 - 1/4 steps -#define MA_vol_lsb_ch1__a 70 -#define MA_vol_lsb_ch1__len 2 -#define MA_vol_lsb_ch1__mask 0x0c -#define MA_vol_lsb_ch1__shift 0x02 -#define MA_vol_lsb_ch1__reset 0x00 -#define set_obj_MA_vol_lsb_ch1(o,y) ({ uint8_t __ret = o.read(70); o.write(70,(__ret&0xf3)|((y<<2)&0x0c)); }) -#define set_MA_vol_lsb_ch1(y) ({ uint8_t __ret = ma_read_byte(70); ma_write_byte(70,(__ret&0xf3)|((y<<2)&0x0c)); }) -#define get_obj_MA_vol_lsb_ch1(o) (o.read(70) & 0x0c)>>2 -#define get_MA_vol_lsb_ch1() ( ma_read_byte(70) & 0x0c)>>2 -//------------------------------------------------------------------------------vol_lsb_ch2--- -// volume channel 2 - 1/4 steps -#define MA_vol_lsb_ch2__a 70 -#define MA_vol_lsb_ch2__len 2 -#define MA_vol_lsb_ch2__mask 0x30 -#define MA_vol_lsb_ch2__shift 0x04 -#define MA_vol_lsb_ch2__reset 0x00 -#define set_obj_MA_vol_lsb_ch2(o,y) ({ uint8_t __ret = o.read(70); o.write(70,(__ret&0xcf)|((y<<4)&0x30)); }) -#define set_MA_vol_lsb_ch2(y) ({ uint8_t __ret = ma_read_byte(70); ma_write_byte(70,(__ret&0xcf)|((y<<4)&0x30)); }) -#define get_obj_MA_vol_lsb_ch2(o) (o.read(70) & 0x30)>>4 -#define get_MA_vol_lsb_ch2() ( ma_read_byte(70) & 0x30)>>4 -//------------------------------------------------------------------------------vol_lsb_ch3--- -// volume channel 3 - 1/4 steps -#define MA_vol_lsb_ch3__a 70 -#define MA_vol_lsb_ch3__len 2 -#define MA_vol_lsb_ch3__mask 0xc0 -#define MA_vol_lsb_ch3__shift 0x06 -#define MA_vol_lsb_ch3__reset 0x00 -#define set_obj_MA_vol_lsb_ch3(o,y) ({ uint8_t __ret = o.read(70); o.write(70,(__ret&0x3f)|((y<<6)&0xc0)); }) -#define set_MA_vol_lsb_ch3(y) ({ uint8_t __ret = ma_read_byte(70); ma_write_byte(70,(__ret&0x3f)|((y<<6)&0xc0)); }) -#define get_obj_MA_vol_lsb_ch3(o) (o.read(70) & 0xc0)>>6 -#define get_MA_vol_lsb_ch3() ( ma_read_byte(70) & 0xc0)>>6 -//------------------------------------------------------------------------------thr_db_ch0--- -// thr_db channel 0 -#define MA_thr_db_ch0__a 71 -#define MA_thr_db_ch0__len 8 -#define MA_thr_db_ch0__mask 0xff -#define MA_thr_db_ch0__shift 0x00 -#define MA_thr_db_ch0__reset 0x18 -#define set_obj_MA_thr_db_ch0(o,y) o.write(71,y); -#define set_MA_thr_db_ch0(y) ma_write_byte(71,y); -#define get_obj_MA_thr_db_ch0(o) (o.read(71) & 0xff)>>0 -#define get_MA_thr_db_ch0() ( ma_read_byte(71) & 0xff)>>0 -//------------------------------------------------------------------------------thr_db_ch1--- -// Thr db ch1 -#define MA_thr_db_ch1__a 72 -#define MA_thr_db_ch1__len 8 -#define MA_thr_db_ch1__mask 0xff -#define MA_thr_db_ch1__shift 0x00 -#define MA_thr_db_ch1__reset 0x18 -#define set_obj_MA_thr_db_ch1(o,y) o.write(72,y); -#define set_MA_thr_db_ch1(y) ma_write_byte(72,y); -#define get_obj_MA_thr_db_ch1(o) (o.read(72) & 0xff)>>0 -#define get_MA_thr_db_ch1() ( ma_read_byte(72) & 0xff)>>0 -//------------------------------------------------------------------------------thr_db_ch2--- -// thr db ch2 -#define MA_thr_db_ch2__a 73 -#define MA_thr_db_ch2__len 8 -#define MA_thr_db_ch2__mask 0xff -#define MA_thr_db_ch2__shift 0x00 -#define MA_thr_db_ch2__reset 0x18 -#define set_obj_MA_thr_db_ch2(o,y) o.write(73,y); -#define set_MA_thr_db_ch2(y) ma_write_byte(73,y); -#define get_obj_MA_thr_db_ch2(o) (o.read(73) & 0xff)>>0 -#define get_MA_thr_db_ch2() ( ma_read_byte(73) & 0xff)>>0 -//------------------------------------------------------------------------------thr_db_ch3--- -// Threshold db ch3 -#define MA_thr_db_ch3__a 74 -#define MA_thr_db_ch3__len 8 -#define MA_thr_db_ch3__mask 0xff -#define MA_thr_db_ch3__shift 0x00 -#define MA_thr_db_ch3__reset 0x18 -#define set_obj_MA_thr_db_ch3(o,y) o.write(74,y); -#define set_MA_thr_db_ch3(y) ma_write_byte(74,y); -#define get_obj_MA_thr_db_ch3(o) (o.read(74) & 0xff)>>0 -#define get_MA_thr_db_ch3() ( ma_read_byte(74) & 0xff)>>0 -//------------------------------------------------------------------------------thr_lsb_ch0--- -// Thr lsb ch0 -#define MA_thr_lsb_ch0__a 75 -#define MA_thr_lsb_ch0__len 2 -#define MA_thr_lsb_ch0__mask 0x03 -#define MA_thr_lsb_ch0__shift 0x00 -#define MA_thr_lsb_ch0__reset 0x00 -#define set_obj_MA_thr_lsb_ch0(o,y) ({ uint8_t __ret = o.read(75); o.write(75,(__ret&0xfc)|((y<<0)&0x03)); }) -#define set_MA_thr_lsb_ch0(y) ({ uint8_t __ret = ma_read_byte(75); ma_write_byte(75,(__ret&0xfc)|((y<<0)&0x03)); }) -#define get_obj_MA_thr_lsb_ch0(o) (o.read(75) & 0x03)>>0 -#define get_MA_thr_lsb_ch0() ( ma_read_byte(75) & 0x03)>>0 -//------------------------------------------------------------------------------thr_lsb_ch1--- -// thr lsb ch1 -#define MA_thr_lsb_ch1__a 75 -#define MA_thr_lsb_ch1__len 2 -#define MA_thr_lsb_ch1__mask 0x0c -#define MA_thr_lsb_ch1__shift 0x02 -#define MA_thr_lsb_ch1__reset 0x00 -#define set_obj_MA_thr_lsb_ch1(o,y) ({ uint8_t __ret = o.read(75); o.write(75,(__ret&0xf3)|((y<<2)&0x0c)); }) -#define set_MA_thr_lsb_ch1(y) ({ uint8_t __ret = ma_read_byte(75); ma_write_byte(75,(__ret&0xf3)|((y<<2)&0x0c)); }) -#define get_obj_MA_thr_lsb_ch1(o) (o.read(75) & 0x0c)>>2 -#define get_MA_thr_lsb_ch1() ( ma_read_byte(75) & 0x0c)>>2 -//------------------------------------------------------------------------------thr_lsb_ch2--- -// thr lsb ch2 1/4 db step -#define MA_thr_lsb_ch2__a 75 -#define MA_thr_lsb_ch2__len 2 -#define MA_thr_lsb_ch2__mask 0x30 -#define MA_thr_lsb_ch2__shift 0x04 -#define MA_thr_lsb_ch2__reset 0x00 -#define set_obj_MA_thr_lsb_ch2(o,y) ({ uint8_t __ret = o.read(75); o.write(75,(__ret&0xcf)|((y<<4)&0x30)); }) -#define set_MA_thr_lsb_ch2(y) ({ uint8_t __ret = ma_read_byte(75); ma_write_byte(75,(__ret&0xcf)|((y<<4)&0x30)); }) -#define get_obj_MA_thr_lsb_ch2(o) (o.read(75) & 0x30)>>4 -#define get_MA_thr_lsb_ch2() ( ma_read_byte(75) & 0x30)>>4 -//------------------------------------------------------------------------------thr_lsb_ch3--- -// threshold lsb ch3 -#define MA_thr_lsb_ch3__a 75 -#define MA_thr_lsb_ch3__len 2 -#define MA_thr_lsb_ch3__mask 0xc0 -#define MA_thr_lsb_ch3__shift 0x06 -#define MA_thr_lsb_ch3__reset 0x00 -#define set_obj_MA_thr_lsb_ch3(o,y) ({ uint8_t __ret = o.read(75); o.write(75,(__ret&0x3f)|((y<<6)&0xc0)); }) -#define set_MA_thr_lsb_ch3(y) ({ uint8_t __ret = ma_read_byte(75); ma_write_byte(75,(__ret&0x3f)|((y<<6)&0xc0)); }) -#define get_obj_MA_thr_lsb_ch3(o) (o.read(75) & 0xc0)>>6 -#define get_MA_thr_lsb_ch3() ( ma_read_byte(75) & 0xc0)>>6 -//------------------------------------------------------------------------------dcu_mon0.PM_mon--- -// Power mode monitor channel 0 -#define MA_dcu_mon0__PM_mon__a 96 -#define MA_dcu_mon0__PM_mon__len 2 -#define MA_dcu_mon0__PM_mon__mask 0x03 -#define MA_dcu_mon0__PM_mon__shift 0x00 -#define MA_dcu_mon0__PM_mon__reset 0x00 -#define set_obj_MA_dcu_mon0__PM_mon(o,y) ({ uint8_t __ret = o.read(96); o.write(96,(__ret&0xfc)|((y<<0)&0x03)); }) -#define set_MA_dcu_mon0__PM_mon(y) ({ uint8_t __ret = ma_read_byte(96); ma_write_byte(96,(__ret&0xfc)|((y<<0)&0x03)); }) -#define get_obj_MA_dcu_mon0__PM_mon(o) (o.read(96) & 0x03)>>0 -#define get_MA_dcu_mon0__PM_mon() ( ma_read_byte(96) & 0x03)>>0 -//------------------------------------------------------------------------------dcu_mon0.freqMode_mon--- -// Frequence mode monitor channel 0 -#define MA_dcu_mon0__freqMode_mon__a 96 -#define MA_dcu_mon0__freqMode_mon__len 3 -#define MA_dcu_mon0__freqMode_mon__mask 0x70 -#define MA_dcu_mon0__freqMode_mon__shift 0x04 -#define MA_dcu_mon0__freqMode_mon__reset 0x00 -#define set_obj_MA_dcu_mon0__freqMode_mon(o,y) ({ uint8_t __ret = o.read(96); o.write(96,(__ret&0x8f)|((y<<4)&0x70)); }) -#define set_MA_dcu_mon0__freqMode_mon(y) ({ uint8_t __ret = ma_read_byte(96); ma_write_byte(96,(__ret&0x8f)|((y<<4)&0x70)); }) -#define get_obj_MA_dcu_mon0__freqMode_mon(o) (o.read(96) & 0x70)>>4 -#define get_MA_dcu_mon0__freqMode_mon() ( ma_read_byte(96) & 0x70)>>4 -//------------------------------------------------------------------------------dcu_mon0.pps_passed--- -// DCU0 PPS completion indicator -#define MA_dcu_mon0__pps_passed__a 96 -#define MA_dcu_mon0__pps_passed__len 1 -#define MA_dcu_mon0__pps_passed__mask 0x80 -#define MA_dcu_mon0__pps_passed__shift 0x07 -#define MA_dcu_mon0__pps_passed__reset 0x00 -#define set_obj_MA_dcu_mon0__pps_passed(o,y) ({ uint8_t __ret = o.read(96); o.write(96,(__ret&0x7f)|((y<<7)&0x80)); }) -#define set_MA_dcu_mon0__pps_passed(y) ({ uint8_t __ret = ma_read_byte(96); ma_write_byte(96,(__ret&0x7f)|((y<<7)&0x80)); }) -#define get_obj_MA_dcu_mon0__pps_passed(o) (o.read(96) & 0x80)>>7 -#define get_MA_dcu_mon0__pps_passed() ( ma_read_byte(96) & 0x80)>>7 -//------------------------------------------------------------------------------dcu_mon0.OCP_mon--- -// OCP Monitor channel 0 -#define MA_dcu_mon0__OCP_mon__a 97 -#define MA_dcu_mon0__OCP_mon__len 1 -#define MA_dcu_mon0__OCP_mon__mask 0x01 -#define MA_dcu_mon0__OCP_mon__shift 0x00 -#define MA_dcu_mon0__OCP_mon__reset 0x00 -#define set_obj_MA_dcu_mon0__OCP_mon(o,y) ({ uint8_t __ret = o.read(97); o.write(97,(__ret&0xfe)|((y<<0)&0x01)); }) -#define set_MA_dcu_mon0__OCP_mon(y) ({ uint8_t __ret = ma_read_byte(97); ma_write_byte(97,(__ret&0xfe)|((y<<0)&0x01)); }) -#define get_obj_MA_dcu_mon0__OCP_mon(o) (o.read(97) & 0x01)>>0 -#define get_MA_dcu_mon0__OCP_mon() ( ma_read_byte(97) & 0x01)>>0 -//------------------------------------------------------------------------------dcu_mon0.Vcfly1_ok--- -// Cfly1 protection monitor channel 0. -#define MA_dcu_mon0__Vcfly1_ok__a 97 -#define MA_dcu_mon0__Vcfly1_ok__len 1 -#define MA_dcu_mon0__Vcfly1_ok__mask 0x02 -#define MA_dcu_mon0__Vcfly1_ok__shift 0x01 -#define MA_dcu_mon0__Vcfly1_ok__reset 0x00 -#define set_obj_MA_dcu_mon0__Vcfly1_ok(o,y) ({ uint8_t __ret = o.read(97); o.write(97,(__ret&0xfd)|((y<<1)&0x02)); }) -#define set_MA_dcu_mon0__Vcfly1_ok(y) ({ uint8_t __ret = ma_read_byte(97); ma_write_byte(97,(__ret&0xfd)|((y<<1)&0x02)); }) -#define get_obj_MA_dcu_mon0__Vcfly1_ok(o) (o.read(97) & 0x02)>>1 -#define get_MA_dcu_mon0__Vcfly1_ok() ( ma_read_byte(97) & 0x02)>>1 -//------------------------------------------------------------------------------dcu_mon0.Vcfly2_ok--- -// Cfly2 protection monitor channel 0. -#define MA_dcu_mon0__Vcfly2_ok__a 97 -#define MA_dcu_mon0__Vcfly2_ok__len 1 -#define MA_dcu_mon0__Vcfly2_ok__mask 0x04 -#define MA_dcu_mon0__Vcfly2_ok__shift 0x02 -#define MA_dcu_mon0__Vcfly2_ok__reset 0x00 -#define set_obj_MA_dcu_mon0__Vcfly2_ok(o,y) ({ uint8_t __ret = o.read(97); o.write(97,(__ret&0xfb)|((y<<2)&0x04)); }) -#define set_MA_dcu_mon0__Vcfly2_ok(y) ({ uint8_t __ret = ma_read_byte(97); ma_write_byte(97,(__ret&0xfb)|((y<<2)&0x04)); }) -#define get_obj_MA_dcu_mon0__Vcfly2_ok(o) (o.read(97) & 0x04)>>2 -#define get_MA_dcu_mon0__Vcfly2_ok() ( ma_read_byte(97) & 0x04)>>2 -//------------------------------------------------------------------------------dcu_mon0.pvdd_ok--- -// DCU0 PVDD monitor -#define MA_dcu_mon0__pvdd_ok__a 97 -#define MA_dcu_mon0__pvdd_ok__len 1 -#define MA_dcu_mon0__pvdd_ok__mask 0x08 -#define MA_dcu_mon0__pvdd_ok__shift 0x03 -#define MA_dcu_mon0__pvdd_ok__reset 0x00 -#define set_obj_MA_dcu_mon0__pvdd_ok(o,y) ({ uint8_t __ret = o.read(97); o.write(97,(__ret&0xf7)|((y<<3)&0x08)); }) -#define set_MA_dcu_mon0__pvdd_ok(y) ({ uint8_t __ret = ma_read_byte(97); ma_write_byte(97,(__ret&0xf7)|((y<<3)&0x08)); }) -#define get_obj_MA_dcu_mon0__pvdd_ok(o) (o.read(97) & 0x08)>>3 -#define get_MA_dcu_mon0__pvdd_ok() ( ma_read_byte(97) & 0x08)>>3 -//------------------------------------------------------------------------------dcu_mon0.vdd_ok--- -// DCU0 VDD monitor -#define MA_dcu_mon0__vdd_ok__a 97 -#define MA_dcu_mon0__vdd_ok__len 1 -#define MA_dcu_mon0__vdd_ok__mask 0x10 -#define MA_dcu_mon0__vdd_ok__shift 0x04 -#define MA_dcu_mon0__vdd_ok__reset 0x00 -#define set_obj_MA_dcu_mon0__vdd_ok(o,y) ({ uint8_t __ret = o.read(97); o.write(97,(__ret&0xef)|((y<<4)&0x10)); }) -#define set_MA_dcu_mon0__vdd_ok(y) ({ uint8_t __ret = ma_read_byte(97); ma_write_byte(97,(__ret&0xef)|((y<<4)&0x10)); }) -#define get_obj_MA_dcu_mon0__vdd_ok(o) (o.read(97) & 0x10)>>4 -#define get_MA_dcu_mon0__vdd_ok() ( ma_read_byte(97) & 0x10)>>4 -//------------------------------------------------------------------------------dcu_mon0.mute--- -// DCU0 mute monitor -#define MA_dcu_mon0__mute__a 97 -#define MA_dcu_mon0__mute__len 1 -#define MA_dcu_mon0__mute__mask 0x20 -#define MA_dcu_mon0__mute__shift 0x05 -#define MA_dcu_mon0__mute__reset 0x00 -#define set_obj_MA_dcu_mon0__mute(o,y) ({ uint8_t __ret = o.read(97); o.write(97,(__ret&0xdf)|((y<<5)&0x20)); }) -#define set_MA_dcu_mon0__mute(y) ({ uint8_t __ret = ma_read_byte(97); ma_write_byte(97,(__ret&0xdf)|((y<<5)&0x20)); }) -#define get_obj_MA_dcu_mon0__mute(o) (o.read(97) & 0x20)>>5 -#define get_MA_dcu_mon0__mute() ( ma_read_byte(97) & 0x20)>>5 -//------------------------------------------------------------------------------dcu_mon0.M_mon--- -// M sense monitor channel 0 -#define MA_dcu_mon0__M_mon__a 98 -#define MA_dcu_mon0__M_mon__len 8 -#define MA_dcu_mon0__M_mon__mask 0xff -#define MA_dcu_mon0__M_mon__shift 0x00 -#define MA_dcu_mon0__M_mon__reset 0x00 -#define set_obj_MA_dcu_mon0__M_mon(o,y) o.write(98,y); -#define set_MA_dcu_mon0__M_mon(y) ma_write_byte(98,y); -#define get_obj_MA_dcu_mon0__M_mon(o) (o.read(98) & 0xff)>>0 -#define get_MA_dcu_mon0__M_mon() ( ma_read_byte(98) & 0xff)>>0 -//------------------------------------------------------------------------------dcu_mon1.PM_mon--- -// Power mode monitor channel 1 -#define MA_dcu_mon1__PM_mon__a 100 -#define MA_dcu_mon1__PM_mon__len 2 -#define MA_dcu_mon1__PM_mon__mask 0x03 -#define MA_dcu_mon1__PM_mon__shift 0x00 -#define MA_dcu_mon1__PM_mon__reset 0x00 -#define set_obj_MA_dcu_mon1__PM_mon(o,y) ({ uint8_t __ret = o.read(100); o.write(100,(__ret&0xfc)|((y<<0)&0x03)); }) -#define set_MA_dcu_mon1__PM_mon(y) ({ uint8_t __ret = ma_read_byte(100); ma_write_byte(100,(__ret&0xfc)|((y<<0)&0x03)); }) -#define get_obj_MA_dcu_mon1__PM_mon(o) (o.read(100) & 0x03)>>0 -#define get_MA_dcu_mon1__PM_mon() ( ma_read_byte(100) & 0x03)>>0 -//------------------------------------------------------------------------------dcu_mon1.freqMode_mon--- -// Frequence mode monitor channel 1 -#define MA_dcu_mon1__freqMode_mon__a 100 -#define MA_dcu_mon1__freqMode_mon__len 3 -#define MA_dcu_mon1__freqMode_mon__mask 0x70 -#define MA_dcu_mon1__freqMode_mon__shift 0x04 -#define MA_dcu_mon1__freqMode_mon__reset 0x00 -#define set_obj_MA_dcu_mon1__freqMode_mon(o,y) ({ uint8_t __ret = o.read(100); o.write(100,(__ret&0x8f)|((y<<4)&0x70)); }) -#define set_MA_dcu_mon1__freqMode_mon(y) ({ uint8_t __ret = ma_read_byte(100); ma_write_byte(100,(__ret&0x8f)|((y<<4)&0x70)); }) -#define get_obj_MA_dcu_mon1__freqMode_mon(o) (o.read(100) & 0x70)>>4 -#define get_MA_dcu_mon1__freqMode_mon() ( ma_read_byte(100) & 0x70)>>4 -//------------------------------------------------------------------------------dcu_mon1.pps_passed--- -// DCU1 PPS completion indicator -#define MA_dcu_mon1__pps_passed__a 100 -#define MA_dcu_mon1__pps_passed__len 1 -#define MA_dcu_mon1__pps_passed__mask 0x80 -#define MA_dcu_mon1__pps_passed__shift 0x07 -#define MA_dcu_mon1__pps_passed__reset 0x00 -#define set_obj_MA_dcu_mon1__pps_passed(o,y) ({ uint8_t __ret = o.read(100); o.write(100,(__ret&0x7f)|((y<<7)&0x80)); }) -#define set_MA_dcu_mon1__pps_passed(y) ({ uint8_t __ret = ma_read_byte(100); ma_write_byte(100,(__ret&0x7f)|((y<<7)&0x80)); }) -#define get_obj_MA_dcu_mon1__pps_passed(o) (o.read(100) & 0x80)>>7 -#define get_MA_dcu_mon1__pps_passed() ( ma_read_byte(100) & 0x80)>>7 -//------------------------------------------------------------------------------dcu_mon1.OCP_mon--- -// OCP Monitor channel 1 -#define MA_dcu_mon1__OCP_mon__a 101 -#define MA_dcu_mon1__OCP_mon__len 1 -#define MA_dcu_mon1__OCP_mon__mask 0x01 -#define MA_dcu_mon1__OCP_mon__shift 0x00 -#define MA_dcu_mon1__OCP_mon__reset 0x00 -#define set_obj_MA_dcu_mon1__OCP_mon(o,y) ({ uint8_t __ret = o.read(101); o.write(101,(__ret&0xfe)|((y<<0)&0x01)); }) -#define set_MA_dcu_mon1__OCP_mon(y) ({ uint8_t __ret = ma_read_byte(101); ma_write_byte(101,(__ret&0xfe)|((y<<0)&0x01)); }) -#define get_obj_MA_dcu_mon1__OCP_mon(o) (o.read(101) & 0x01)>>0 -#define get_MA_dcu_mon1__OCP_mon() ( ma_read_byte(101) & 0x01)>>0 -//------------------------------------------------------------------------------dcu_mon1.Vcfly1_ok--- -// Cfly1 protcetion monitor channel 1 -#define MA_dcu_mon1__Vcfly1_ok__a 101 -#define MA_dcu_mon1__Vcfly1_ok__len 1 -#define MA_dcu_mon1__Vcfly1_ok__mask 0x02 -#define MA_dcu_mon1__Vcfly1_ok__shift 0x01 -#define MA_dcu_mon1__Vcfly1_ok__reset 0x00 -#define set_obj_MA_dcu_mon1__Vcfly1_ok(o,y) ({ uint8_t __ret = o.read(101); o.write(101,(__ret&0xfd)|((y<<1)&0x02)); }) -#define set_MA_dcu_mon1__Vcfly1_ok(y) ({ uint8_t __ret = ma_read_byte(101); ma_write_byte(101,(__ret&0xfd)|((y<<1)&0x02)); }) -#define get_obj_MA_dcu_mon1__Vcfly1_ok(o) (o.read(101) & 0x02)>>1 -#define get_MA_dcu_mon1__Vcfly1_ok() ( ma_read_byte(101) & 0x02)>>1 -//------------------------------------------------------------------------------dcu_mon1.Vcfly2_ok--- -// Cfly2 protection monitor channel 1 -#define MA_dcu_mon1__Vcfly2_ok__a 101 -#define MA_dcu_mon1__Vcfly2_ok__len 1 -#define MA_dcu_mon1__Vcfly2_ok__mask 0x04 -#define MA_dcu_mon1__Vcfly2_ok__shift 0x02 -#define MA_dcu_mon1__Vcfly2_ok__reset 0x00 -#define set_obj_MA_dcu_mon1__Vcfly2_ok(o,y) ({ uint8_t __ret = o.read(101); o.write(101,(__ret&0xfb)|((y<<2)&0x04)); }) -#define set_MA_dcu_mon1__Vcfly2_ok(y) ({ uint8_t __ret = ma_read_byte(101); ma_write_byte(101,(__ret&0xfb)|((y<<2)&0x04)); }) -#define get_obj_MA_dcu_mon1__Vcfly2_ok(o) (o.read(101) & 0x04)>>2 -#define get_MA_dcu_mon1__Vcfly2_ok() ( ma_read_byte(101) & 0x04)>>2 -//------------------------------------------------------------------------------dcu_mon1.pvdd_ok--- -// DCU1 PVDD monitor -#define MA_dcu_mon1__pvdd_ok__a 101 -#define MA_dcu_mon1__pvdd_ok__len 1 -#define MA_dcu_mon1__pvdd_ok__mask 0x08 -#define MA_dcu_mon1__pvdd_ok__shift 0x03 -#define MA_dcu_mon1__pvdd_ok__reset 0x00 -#define set_obj_MA_dcu_mon1__pvdd_ok(o,y) ({ uint8_t __ret = o.read(101); o.write(101,(__ret&0xf7)|((y<<3)&0x08)); }) -#define set_MA_dcu_mon1__pvdd_ok(y) ({ uint8_t __ret = ma_read_byte(101); ma_write_byte(101,(__ret&0xf7)|((y<<3)&0x08)); }) -#define get_obj_MA_dcu_mon1__pvdd_ok(o) (o.read(101) & 0x08)>>3 -#define get_MA_dcu_mon1__pvdd_ok() ( ma_read_byte(101) & 0x08)>>3 -//------------------------------------------------------------------------------dcu_mon1.vdd_ok--- -// DCU1 VDD monitor -#define MA_dcu_mon1__vdd_ok__a 101 -#define MA_dcu_mon1__vdd_ok__len 1 -#define MA_dcu_mon1__vdd_ok__mask 0x10 -#define MA_dcu_mon1__vdd_ok__shift 0x04 -#define MA_dcu_mon1__vdd_ok__reset 0x00 -#define set_obj_MA_dcu_mon1__vdd_ok(o,y) ({ uint8_t __ret = o.read(101); o.write(101,(__ret&0xef)|((y<<4)&0x10)); }) -#define set_MA_dcu_mon1__vdd_ok(y) ({ uint8_t __ret = ma_read_byte(101); ma_write_byte(101,(__ret&0xef)|((y<<4)&0x10)); }) -#define get_obj_MA_dcu_mon1__vdd_ok(o) (o.read(101) & 0x10)>>4 -#define get_MA_dcu_mon1__vdd_ok() ( ma_read_byte(101) & 0x10)>>4 -//------------------------------------------------------------------------------dcu_mon1.mute--- -// DCU1 mute monitor -#define MA_dcu_mon1__mute__a 101 -#define MA_dcu_mon1__mute__len 1 -#define MA_dcu_mon1__mute__mask 0x20 -#define MA_dcu_mon1__mute__shift 0x05 -#define MA_dcu_mon1__mute__reset 0x00 -#define set_obj_MA_dcu_mon1__mute(o,y) ({ uint8_t __ret = o.read(101); o.write(101,(__ret&0xdf)|((y<<5)&0x20)); }) -#define set_MA_dcu_mon1__mute(y) ({ uint8_t __ret = ma_read_byte(101); ma_write_byte(101,(__ret&0xdf)|((y<<5)&0x20)); }) -#define get_obj_MA_dcu_mon1__mute(o) (o.read(101) & 0x20)>>5 -#define get_MA_dcu_mon1__mute() ( ma_read_byte(101) & 0x20)>>5 -//------------------------------------------------------------------------------dcu_mon1.M_mon--- -// M sense monitor channel 1 -#define MA_dcu_mon1__M_mon__a 102 -#define MA_dcu_mon1__M_mon__len 8 -#define MA_dcu_mon1__M_mon__mask 0xff -#define MA_dcu_mon1__M_mon__shift 0x00 -#define MA_dcu_mon1__M_mon__reset 0x00 -#define set_obj_MA_dcu_mon1__M_mon(o,y) o.write(102,y); -#define set_MA_dcu_mon1__M_mon(y) ma_write_byte(102,y); -#define get_obj_MA_dcu_mon1__M_mon(o) (o.read(102) & 0xff)>>0 -#define get_MA_dcu_mon1__M_mon() ( ma_read_byte(102) & 0xff)>>0 -//------------------------------------------------------------------------------dcu_mon0.sw_enable--- -// DCU0 Switch enable monitor -#define MA_dcu_mon0__sw_enable__a 104 -#define MA_dcu_mon0__sw_enable__len 1 -#define MA_dcu_mon0__sw_enable__mask 0x40 -#define MA_dcu_mon0__sw_enable__shift 0x06 -#define MA_dcu_mon0__sw_enable__reset 0x00 -#define set_obj_MA_dcu_mon0__sw_enable(o,y) ({ uint8_t __ret = o.read(104); o.write(104,(__ret&0xbf)|((y<<6)&0x40)); }) -#define set_MA_dcu_mon0__sw_enable(y) ({ uint8_t __ret = ma_read_byte(104); ma_write_byte(104,(__ret&0xbf)|((y<<6)&0x40)); }) -#define get_obj_MA_dcu_mon0__sw_enable(o) (o.read(104) & 0x40)>>6 -#define get_MA_dcu_mon0__sw_enable() ( ma_read_byte(104) & 0x40)>>6 -//------------------------------------------------------------------------------dcu_mon1.sw_enable--- -// DCU1 Switch enable monitor -#define MA_dcu_mon1__sw_enable__a 104 -#define MA_dcu_mon1__sw_enable__len 1 -#define MA_dcu_mon1__sw_enable__mask 0x80 -#define MA_dcu_mon1__sw_enable__shift 0x07 -#define MA_dcu_mon1__sw_enable__reset 0x00 -#define set_obj_MA_dcu_mon1__sw_enable(o,y) ({ uint8_t __ret = o.read(104); o.write(104,(__ret&0x7f)|((y<<7)&0x80)); }) -#define set_MA_dcu_mon1__sw_enable(y) ({ uint8_t __ret = ma_read_byte(104); ma_write_byte(104,(__ret&0x7f)|((y<<7)&0x80)); }) -#define get_obj_MA_dcu_mon1__sw_enable(o) (o.read(104) & 0x80)>>7 -#define get_MA_dcu_mon1__sw_enable() ( ma_read_byte(104) & 0x80)>>7 -//------------------------------------------------------------------------------hvboot0_ok_mon--- -// HVboot0_ok for test/debug -#define MA_hvboot0_ok_mon__a 105 -#define MA_hvboot0_ok_mon__len 1 -#define MA_hvboot0_ok_mon__mask 0x40 -#define MA_hvboot0_ok_mon__shift 0x06 -#define MA_hvboot0_ok_mon__reset 0x00 -#define set_obj_MA_hvboot0_ok_mon(o,y) ({ uint8_t __ret = o.read(105); o.write(105,(__ret&0xbf)|((y<<6)&0x40)); }) -#define set_MA_hvboot0_ok_mon(y) ({ uint8_t __ret = ma_read_byte(105); ma_write_byte(105,(__ret&0xbf)|((y<<6)&0x40)); }) -#define get_obj_MA_hvboot0_ok_mon(o) (o.read(105) & 0x40)>>6 -#define get_MA_hvboot0_ok_mon() ( ma_read_byte(105) & 0x40)>>6 -//------------------------------------------------------------------------------hvboot1_ok_mon--- -// HVboot1_ok for test/debug -#define MA_hvboot1_ok_mon__a 105 -#define MA_hvboot1_ok_mon__len 1 -#define MA_hvboot1_ok_mon__mask 0x80 -#define MA_hvboot1_ok_mon__shift 0x07 -#define MA_hvboot1_ok_mon__reset 0x00 -#define set_obj_MA_hvboot1_ok_mon(o,y) ({ uint8_t __ret = o.read(105); o.write(105,(__ret&0x7f)|((y<<7)&0x80)); }) -#define set_MA_hvboot1_ok_mon(y) ({ uint8_t __ret = ma_read_byte(105); ma_write_byte(105,(__ret&0x7f)|((y<<7)&0x80)); }) -#define get_obj_MA_hvboot1_ok_mon(o) (o.read(105) & 0x80)>>7 -#define get_MA_hvboot1_ok_mon() ( ma_read_byte(105) & 0x80)>>7 -//------------------------------------------------------------------------------error_acc--- -// Accumulated errors, at and after triggering -#define MA_error_acc__a 109 -#define MA_error_acc__len 8 -#define MA_error_acc__mask 0xff -#define MA_error_acc__shift 0x00 -#define MA_error_acc__reset 0x00 -#define set_obj_MA_error_acc(o,y) o.write(109,y); -#define set_MA_error_acc(y) ma_write_byte(109,y); -#define get_obj_MA_error_acc(o) (o.read(109) & 0xff)>>0 -#define get_MA_error_acc() ( ma_read_byte(109) & 0xff)>>0 -//------------------------------------------------------------------------------i2s_data_rate--- -// Detected i2s data rate: 00/01/10 = x1/x2/x4 -#define MA_i2s_data_rate__a 116 -#define MA_i2s_data_rate__len 2 -#define MA_i2s_data_rate__mask 0x03 -#define MA_i2s_data_rate__shift 0x00 -#define MA_i2s_data_rate__reset 0x00 -#define set_obj_MA_i2s_data_rate(o,y) ({ uint8_t __ret = o.read(116); o.write(116,(__ret&0xfc)|((y<<0)&0x03)); }) -#define set_MA_i2s_data_rate(y) ({ uint8_t __ret = ma_read_byte(116); ma_write_byte(116,(__ret&0xfc)|((y<<0)&0x03)); }) -#define get_obj_MA_i2s_data_rate(o) (o.read(116) & 0x03)>>0 -#define get_MA_i2s_data_rate() ( ma_read_byte(116) & 0x03)>>0 -//------------------------------------------------------------------------------audio_in_mode_mon--- -// Audio input mode monitor -#define MA_audio_in_mode_mon__a 116 -#define MA_audio_in_mode_mon__len 3 -#define MA_audio_in_mode_mon__mask 0x1c -#define MA_audio_in_mode_mon__shift 0x02 -#define MA_audio_in_mode_mon__reset 0x00 -#define set_obj_MA_audio_in_mode_mon(o,y) ({ uint8_t __ret = o.read(116); o.write(116,(__ret&0xe3)|((y<<2)&0x1c)); }) -#define set_MA_audio_in_mode_mon(y) ({ uint8_t __ret = ma_read_byte(116); ma_write_byte(116,(__ret&0xe3)|((y<<2)&0x1c)); }) -#define get_obj_MA_audio_in_mode_mon(o) (o.read(116) & 0x1c)>>2 -#define get_MA_audio_in_mode_mon() ( ma_read_byte(116) & 0x1c)>>2 -//------------------------------------------------------------------------------msel_mon--- -// MSEL[2:0] monitor register -#define MA_msel_mon__a 117 -#define MA_msel_mon__len 3 -#define MA_msel_mon__mask 0x07 -#define MA_msel_mon__shift 0x00 -#define MA_msel_mon__reset 0x00 -#define set_obj_MA_msel_mon(o,y) ({ uint8_t __ret = o.read(117); o.write(117,(__ret&0xf8)|((y<<0)&0x07)); }) -#define set_MA_msel_mon(y) ({ uint8_t __ret = ma_read_byte(117); ma_write_byte(117,(__ret&0xf8)|((y<<0)&0x07)); }) -#define get_obj_MA_msel_mon(o) (o.read(117) & 0x07)>>0 -#define get_MA_msel_mon() ( ma_read_byte(117) & 0x07)>>0 -//------------------------------------------------------------------------------error--- -// Current error flag monitor reg - for app. ctrl. -#define MA_error__a 124 -#define MA_error__len 8 -#define MA_error__mask 0xff -#define MA_error__shift 0x00 -#define MA_error__reset 0x00 -#define set_obj_MA_error(o,y) o.write(124,y); -#define set_MA_error(y) ma_write_byte(124,y); -#define get_obj_MA_error(o) (o.read(124) & 0xff)>>0 -#define get_MA_error() ( ma_read_byte(124) & 0xff)>>0 -//------------------------------------------------------------------------------audio_proc_limiter_mon--- -// b7-b4: Channel 3-0 limiter active -#define MA_audio_proc_limiter_mon__a 126 -#define MA_audio_proc_limiter_mon__len 4 -#define MA_audio_proc_limiter_mon__mask 0xf0 -#define MA_audio_proc_limiter_mon__shift 0x04 -#define MA_audio_proc_limiter_mon__reset 0x00 -#define set_obj_MA_audio_proc_limiter_mon(o,y) ({ uint8_t __ret = o.read(126); o.write(126,(__ret&0x0f)|((y<<4)&0xf0)); }) -#define set_MA_audio_proc_limiter_mon(y) ({ uint8_t __ret = ma_read_byte(126); ma_write_byte(126,(__ret&0x0f)|((y<<4)&0xf0)); }) -#define get_obj_MA_audio_proc_limiter_mon(o) (o.read(126) & 0xf0)>>4 -#define get_MA_audio_proc_limiter_mon() ( ma_read_byte(126) & 0xf0)>>4 -//------------------------------------------------------------------------------audio_proc_clip_mon--- -// b3-b0: Channel 3-0 clipping monitor -#define MA_audio_proc_clip_mon__a 126 -#define MA_audio_proc_clip_mon__len 4 -#define MA_audio_proc_clip_mon__mask 0x0f -#define MA_audio_proc_clip_mon__shift 0x00 -#define MA_audio_proc_clip_mon__reset 0x00 -#define set_obj_MA_audio_proc_clip_mon(o,y) ({ uint8_t __ret = o.read(126); o.write(126,(__ret&0xf0)|((y<<0)&0x0f)); }) -#define set_MA_audio_proc_clip_mon(y) ({ uint8_t __ret = ma_read_byte(126); ma_write_byte(126,(__ret&0xf0)|((y<<0)&0x0f)); }) -#define get_obj_MA_audio_proc_clip_mon(o) (o.read(126) & 0x0f)>>0 -#define get_MA_audio_proc_clip_mon() ( ma_read_byte(126) & 0x0f)>>0 - -//------------------------------------------------------------------------------hw_version--- -// Hardware version ID number -#define MA_hw_version__a 127 -#define MA_hw_version__len 8 -#define MA_hw_version__mask 0xff -#define MA_hw_version__shift 0x00 -#define MA_hw_version__reset 0x00 -#define set_obj_MA_hw_version(o,y) o.write(127,y); -#define set_MA_hw_version(y) ma_write_byte(127,y); -#define get_obj_MA_hw_version(o) (o.read(127) & 0xff)>>0 -#define get_MA_hw_version() ( ma_read_byte(127) & 0xff)>>0 - - -#endif /* _MA120X0_H_ */ diff --git a/components/dsp_processor/CMakeLists.txt b/components/dsp_processor/CMakeLists.txt deleted file mode 100644 index 95377c1..0000000 --- a/components/dsp_processor/CMakeLists.txt +++ /dev/null @@ -1,4 +0,0 @@ -idf_component_register(SRCS "dsp_processor.c" - INCLUDE_DIRS "include" - REQUIRES esp-dsp) - diff --git a/components/dsp_processor/Kconfig.projbuild b/components/dsp_processor/Kconfig.projbuild deleted file mode 100644 index 2e8c696..0000000 --- a/components/dsp_processor/Kconfig.projbuild +++ /dev/null @@ -1,53 +0,0 @@ -# Config file for ESP32 DSP Processor - -menu "ESP32 audio buffer and I2S pin config" - config USE_PSRAM - bool "Use PSRAM" - default true - help - Need wrover class modules with large SPRAM to have required buffers for Snapcast network delay - - config BITS_PER_SAMPLE - int "bits per sample output to i2s driver" - default 32 - help - Select number of bits per sample for codec configed and connected to esp32 i2s dma hw - - config MASTER_I2S_BCK_PIN - int "Master i2s bck" - default 23 - help - Master audio interface bit clock. - - config MASTER_I2S_LRCK_PIN - int "Master i2s lrck" - default 13 - help - Master audio interface left/right sync clock. - - config MASTER_I2S_DATAOUT_PIN - int "Master i2s data out" - default 14 - help - Master audio interface data out. - - config SLAVE_I2S_BCK_PIN - int "Slave i2s bck" - default 26 - help - Slave audio interface bit clock. - - config SLAVE_I2S_LRCK_PIN - int "Slave i2s lrck" - default 12 - help - Slave audio interface left/right sync clock. - - config SLAVE_I2S_DATAOUT_PIN - int "Slave i2s data out" - default 5 - help - Slave audio interface data out. - - -endmenu diff --git a/components/dsp_processor/component.mk b/components/dsp_processor/component.mk deleted file mode 100644 index 0849d56..0000000 --- a/components/dsp_processor/component.mk +++ /dev/null @@ -1,11 +0,0 @@ -# -# Main Makefile. This is basically the same as a component makefile. -# -# This Makefile should, at the very least, just include $(SDK_PATH)/make/component_common.mk. By default, -# this will take the sources in the src/ directory, compile them and link them into -# lib(subdirectory_name).a in the build directory. This behaviour is entirely configurable, -# please read the ESP-IDF documents if you need to do this. -# - -COMPONENT_SRCDIRS := . -# CFLAGS += diff --git a/components/dsp_processor/dsp_processor.c b/components/dsp_processor/dsp_processor.c deleted file mode 100644 index 4bdb2b2..0000000 --- a/components/dsp_processor/dsp_processor.c +++ /dev/null @@ -1,398 +0,0 @@ - - -#include -#include "freertos/FreeRTOS.h" -#include "freertos/task.h" -#include "esp_log.h" - -#include "driver/i2s.h" -#include "freertos/ringbuf.h" -#include "dsps_biquad_gen.h" -#include "dsps_biquad.h" -//#include "websocket_if.h" -#include "dsp_processor.h" - - -uint32_t bits_per_sample = CONFIG_BITS_PER_SAMPLE; - -static xTaskHandle s_dsp_i2s_task_handle = NULL; -static RingbufHandle_t s_ringbuf_i2s = NULL; - -extern xQueueHandle i2s_queue; - -extern uint32_t buffer_ms; -extern uint8_t muteCH[4]; - -uint dspFlow = dspfStereo; - -ptype_t bq[6]; - -void setup_dsp_i2s(uint32_t sample_rate, bool slave_i2s) -{ - i2s_config_t i2s_config0 = { - .mode = I2S_MODE_MASTER | I2S_MODE_TX, // Only TX - .sample_rate = sample_rate, - .bits_per_sample = bits_per_sample, - .channel_format = I2S_CHANNEL_FMT_RIGHT_LEFT, // 2-channels - .communication_format = I2S_COMM_FORMAT_I2S , - .dma_buf_count = 8, - .dma_buf_len = 480, - .intr_alloc_flags = 1, //Default interrupt priority - .use_apll = true, - .fixed_mclk = 0, - .tx_desc_auto_clear = true // Auto clear tx descriptor on underflow - }; - - i2s_pin_config_t pin_config0 = { - .bck_io_num = CONFIG_MASTER_I2S_BCK_PIN, - .ws_io_num = CONFIG_MASTER_I2S_LRCK_PIN, - .data_out_num = CONFIG_MASTER_I2S_DATAOUT_PIN, - .data_in_num = -1 //Not used - }; - - i2s_driver_install(0, &i2s_config0, 7, &i2s_queue); - i2s_zero_dma_buffer(0); - i2s_set_pin(0, &pin_config0); - - i2s_config_t i2s_config1 = { - .mode = I2S_MODE_SLAVE | I2S_MODE_TX, // Only TX - Slave channel - .sample_rate = sample_rate, - .bits_per_sample = bits_per_sample, - .channel_format = I2S_CHANNEL_FMT_RIGHT_LEFT, // 2-channels - .communication_format = I2S_COMM_FORMAT_I2S, - .dma_buf_count = 8, - .dma_buf_len = 480, - .use_apll = true, - .fixed_mclk = 0, - .tx_desc_auto_clear = true // Auto clear tx descriptor on underflow - }; - - i2s_pin_config_t pin_config1 = { - .bck_io_num = CONFIG_SLAVE_I2S_BCK_PIN, - .ws_io_num = CONFIG_SLAVE_I2S_LRCK_PIN, - .data_out_num = CONFIG_SLAVE_I2S_DATAOUT_PIN, - .data_in_num = -1 //Not used - }; - - if (slave_i2s) { - i2s_driver_install(1, &i2s_config1, 7, &i2s_queue); - i2s_zero_dma_buffer(1); - i2s_set_pin(1, &pin_config1); - } -} - - -static void dsp_i2s_task_handler(void *arg) -{ uint32_t cnt = 0; - uint8_t *audio = NULL; - float sbuffer0[1024]; - float sbuffer1[1024]; - float sbuffer2[1024]; - float sbufout0[1024]; - float sbufout1[1024]; - float sbufout2[1024]; - float sbuftmp0[1024]; - - uint8_t dsp_audio[4*1024]; - uint8_t dsp_audio1[4*1024]; - - size_t chunk_size = 0; - size_t bytes_written = 0; - muteCH[0] = 0; - muteCH[1] = 0; - muteCH[2] = 0; - muteCH[3] = 0; - uint32_t inBuffer,freeBuffer,wbuf,rbuf ; - - static int32_t avgcnt = 0; - uint32_t avgcntlen = 64; // x 960/4*1/fs = 320ms @48000 kHz - uint32_t avgarray[128] = {0}; - uint32_t sum; - float avg ; - for (;;) { - // Condition state Action - // Buffer is empty - because not being filled Stopped Wait - // Buffer is increasing and below target Filling Wait - // Buffer above target Playing Consume from buffer - // Buffer is below target Playing Short delay - - cnt++; - audio = (uint8_t *)xRingbufferReceiveUpTo(s_ringbuf_i2s, &chunk_size,(portTickType) 20 ,960); // 200 ms timeout - - vRingbufferGetInfo(s_ringbuf_i2s, &freeBuffer, &rbuf, &wbuf, NULL, &inBuffer ); - - if (avgcnt >= avgcntlen) { avgcnt = 0; } - avgarray[avgcnt++] = inBuffer; - sum = 0; - for (int n = 0; n < avgcntlen ; n++) - { sum = sum + avgarray[n]; - } - avg = sum / avgcntlen; - - #ifndef CONFIG_USE_PSRAM - buffer_ms = 150; - #endif - - if (inBuffer < (buffer_ms*48*4)) {vTaskDelay(1); } - - //audio = (uint8_t *)xRingbufferReceiveUpTo(s_ringbuf_i2s, &chunk_size,(portTickType) 20 ,960); // 200 ms timeout - - //audio = (uint8_t *)xRingbufferReceive(s_ringbuf_i2s, &chunk_size, (portTickType)portMAX_DELAY); - if (chunk_size == 0) - { printf("wait ... buffer : %d\n",inBuffer); - } - //else if (inBuffer < (buffer_ms*48*4)) - //{ printf("Buffering ... buffer : %d\n",inBuffer); - //} - else - { int16_t len = chunk_size/4; - if (cnt%200 < 16) - { ESP_LOGI("I2S", "Chunk :%d %d %.0f",chunk_size, inBuffer, avg ); - //xRingbufferPrintInfo(s_ringbuf_i2s); - } - - /*for (uint16_t i=0;i>8); - dsp_audio[i*4+2] = (valint[1] & 0xff); - dsp_audio[i*4+3] = ((valint[1] & 0xff00)>>8); - } - if (bits_per_sample == 16) { - i2s_write(0,(char*)audio, chunk_size, &bytes_written, portMAX_DELAY); - } else - { i2s_write_expand(0, (char*)audio, chunk_size,16,32, &bytes_written, portMAX_DELAY); - } - } - break; - - case dspf2DOT1 : - { // Process audio L + R LOW PASS FILTER - dsps_biquad_f32_ae32(sbuffer2, sbuftmp0, len, bq[0].coeffs, bq[0].w); - dsps_biquad_f32_ae32(sbuftmp0, sbufout2, len, bq[1].coeffs, bq[1].w); - - // Process audio L HIGH PASS FILTER - dsps_biquad_f32_ae32(sbuffer0, sbuftmp0, len, bq[2].coeffs, bq[2].w); - dsps_biquad_f32_ae32(sbuftmp0, sbufout0, len, bq[3].coeffs, bq[3].w); - - // Process audio R HIGH PASS FILTER - dsps_biquad_f32_ae32(sbuffer1, sbuftmp0, len, bq[4].coeffs, bq[4].w); - dsps_biquad_f32_ae32(sbuftmp0, sbufout1, len, bq[5].coeffs, bq[5].w); - - int16_t valint[5]; - for (uint16_t i=0; i>8); - dsp_audio[i*4+2] = 0; - dsp_audio[i*4+3] = 0; - - dsp_audio1[i*4+0] = (valint[0] & 0xff); - dsp_audio1[i*4+1] = ((valint[0] & 0xff00)>>8); - dsp_audio1[i*4+2] = (valint[1] & 0xff); - dsp_audio1[i*4+3] = ((valint[1] & 0xff00)>>8); - } - i2s_write_expand(0, (char*)dsp_audio, chunk_size,16,32, &bytes_written, portMAX_DELAY); - i2s_write_expand(1, (char*)dsp_audio1, chunk_size,16,32, &bytes_written, portMAX_DELAY); - } - break; - case dspfFunkyHonda : - { // Process audio L + R LOW PASS FILTER - dsps_biquad_f32_ae32(sbuffer2, sbuftmp0, len, bq[0].coeffs, bq[0].w); - dsps_biquad_f32_ae32(sbuftmp0, sbufout2, len, bq[1].coeffs, bq[1].w); - - // Process audio L HIGH PASS FILTER - dsps_biquad_f32_ae32(sbuffer0, sbuftmp0, len, bq[2].coeffs, bq[2].w); - dsps_biquad_f32_ae32(sbuftmp0, sbufout0, len, bq[3].coeffs, bq[3].w); - - // Process audio R HIGH PASS FILTER - dsps_biquad_f32_ae32(sbuffer1, sbuftmp0, len, bq[4].coeffs, bq[4].w); - dsps_biquad_f32_ae32(sbuftmp0, sbufout1, len, bq[5].coeffs, bq[5].w); - - uint16_t scale = 16384; //32768 - int16_t valint[5]; - for (uint16_t i=0; i>8); - dsp_audio[i*4+2] = (valint[2] & 0xff); - dsp_audio[i*4+3] = ((valint[2] & 0xff00)>>8); - - dsp_audio1[i*4+0] = (valint[4] & 0xff); - dsp_audio1[i*4+1] = ((valint[4] & 0xff00)>>8); - dsp_audio1[i*4+2] = (valint[5] & 0xff); - dsp_audio1[i*4+3] = ((valint[5] & 0xff00)>>8); - } - i2s_write_expand(0, (char*)dsp_audio, chunk_size,16,32, &bytes_written, portMAX_DELAY); - i2s_write_expand(1, (char*)dsp_audio1, chunk_size,16,32, &bytes_written, portMAX_DELAY); - } - break; - default : - break; - } - - - if (cnt%100==0) - { //ws_server_send_bin_client(0,(char*)audio, 240); - //printf("%d %d \n",byteWritten, i2s_evt.size ); - } - vRingbufferReturnItem(s_ringbuf_i2s,(void *)audio); - } - } -} -// buffer size must hold 400ms-1000ms // for 2ch16b48000 that is 76800 - 192000 or 75-188 x 1024 - -#define BUFFER_SIZE 192*1024 - -void dsp_i2s_task_init(uint32_t sample_rate,bool slave) -{ setup_dsp_i2s(sample_rate,slave); - #ifdef CONFIG_USE_PSRAM - printf("Setup ringbuffer using PSRAM \n"); - StaticRingbuffer_t *buffer_struct = (StaticRingbuffer_t *)heap_caps_malloc(sizeof(StaticRingbuffer_t), MALLOC_CAP_SPIRAM); - printf("Buffer_struct ok\n"); - - uint8_t *buffer_storage = (uint8_t *)heap_caps_malloc(sizeof(uint8_t)*BUFFER_SIZE, MALLOC_CAP_SPIRAM); - printf("Buffer_stoarge ok\n"); - s_ringbuf_i2s = xRingbufferCreateStatic(BUFFER_SIZE, RINGBUF_TYPE_BYTEBUF, buffer_storage, buffer_struct); - printf("Ringbuf ok\n"); - #else - printf("Setup ringbuffer using internal ram - only space for 150ms - Snapcast buffer_ms parameter ignored \n"); - s_ringbuf_i2s = xRingbufferCreate(32*1024,RINGBUF_TYPE_BYTEBUF); - #endif - if (s_ringbuf_i2s == NULL) { printf("nospace for ringbuffer\n"); return; } - printf("Ringbuffer ok\n"); - xTaskCreate(dsp_i2s_task_handler, "DSP_I2S", 48*1024, NULL, 6, &s_dsp_i2s_task_handle); -} - -void dsp_i2s_task_deninit(void) -{ if (s_dsp_i2s_task_handle) { - vTaskDelete(s_dsp_i2s_task_handle); - s_dsp_i2s_task_handle = NULL; - } - if (s_ringbuf_i2s) { - vRingbufferDelete(s_ringbuf_i2s); - s_ringbuf_i2s = NULL; - } -} - -size_t write_ringbuf(const uint8_t *data, size_t size) -{ - BaseType_t done = xRingbufferSend(s_ringbuf_i2s, (void *)data, size, (portTickType)portMAX_DELAY); - return (done)?size:0; -} - - -// ESP32 DSP processor -//====================================================== -// Each time a buffer of audio is passed to the DSP - samples are -// processed according to a dynamic list of audio processing nodes. - -// Each audio processor node consist of a data struct holding the -// required weights and states for processing an automomous processing -// function. The high level parameters is maintained in the structre -// as well - -// Release - Prove off concept -// ---------------------------------------- -// Fixed 2x2 biquad flow Xover for biAmp systems -// Interface for cross over frequency and level - -void dsp_setup_flow(double freq, uint32_t samplerate) { - float f = freq/samplerate/2.; - - bq[0] = (ptype_t) { LPF, f, 0, 0.707, NULL, NULL, {0,0,0,0,0}, {0, 0} } ; - bq[1] = (ptype_t) { LPF, f, 0, 0.707, NULL, NULL, {0,0,0,0,0}, {0, 0} } ; - bq[2] = (ptype_t) { HPF, f, 0, 0.707, NULL, NULL, {0,0,0,0,0}, {0, 0} } ; - bq[3] = (ptype_t) { HPF, f, 0, 0.707, NULL, NULL, {0,0,0,0,0}, {0, 0} } ; - bq[4] = (ptype_t) { HPF, f, 0, 0.707, NULL, NULL, {0,0,0,0,0}, {0, 0} } ; - bq[5] = (ptype_t) { HPF, f, 0, 0.707, NULL, NULL, {0,0,0,0,0}, {0, 0} } ; - - pnode_t * aflow = NULL; - aflow = malloc(sizeof(pnode_t)); - if (aflow == NULL) - { printf("Could not create node"); - } - - for (uint8_t n=0; n<=5; n++) - { switch (bq[n].filtertype) { - case LPF: dsps_biquad_gen_lpf_f32( bq[n].coeffs, bq[n].freq, bq[n].q ); - break; - case HPF: dsps_biquad_gen_hpf_f32( bq[n].coeffs, bq[n].freq, bq[n].q ); - break; - default : break; - } - for (uint8_t i = 0;i <=3 ;i++ ) - { printf("%.6f ",bq[n].coeffs[i]); - } - printf("\n"); - } -} - -void dsp_set_xoverfreq(uint8_t freqh, uint8_t freql,uint32_t samplerate) { - float freq = freqh*256 + freql; - printf("%f\n",freq); - float f = freq/samplerate/2.; - for ( int8_t n=0; n<=5; n++) - { bq[n].freq = f ; - switch (bq[n].filtertype) { - case LPF: - for (uint8_t i = 0;i <=4 ;i++ ) - { printf("%.6f ",bq[n].coeffs[i]); } - printf("\n"); - dsps_biquad_gen_lpf_f32( bq[n].coeffs, bq[n].freq, bq[n].q ); - for (uint8_t i = 0;i <=4 ;i++ ) - { printf("%.6f ",bq[n].coeffs[i]); } - printf("%f \n",bq[n].freq); - break; - case HPF: - dsps_biquad_gen_hpf_f32( bq[n].coeffs, bq[n].freq, bq[n].q ); - break; - default : break; - } - } -} diff --git a/components/dsp_processor/include/dsp_processor.h b/components/dsp_processor/include/dsp_processor.h deleted file mode 100644 index b119146..0000000 --- a/components/dsp_processor/include/dsp_processor.h +++ /dev/null @@ -1,36 +0,0 @@ -#ifndef _DSP_PROCESSOR_H_ -#define _DSP_PROCESSOR_H_ - -enum dspFlows {dspfStereo, dspfBiamp, dspf2DOT1, dspfFunkyHonda }; - -size_t write_ringbuf(const uint8_t *data, size_t size); - -void dsp_i2s_task_init(uint32_t sample_rate,bool slave); - -void dsp_i2s_task_deinit(void); - -enum filtertypes { LPF, HPF, BPF, BPF0DB, NOTCH, - ALLPASS360, ALLPASS180, PEAKINGEQ, - LOWSHELF, HIGHSHELF}; - -// Process node -typedef struct ptype { - int filtertype; - float freq; - float gain; - float q; - float *in,*out; - float coeffs[5]; - float w[2]; -} ptype_t; - -// Process flow -typedef struct pnode { - ptype_t process; - struct pnode *next; -} pnode_t; - -void dsp_setup_flow(double freq,uint32_t samplerate); -void dsp_set_xoverfreq(uint8_t, uint8_t, uint32_t ); - -#endif /* _DSP_PROCESSOR_H_ */ diff --git a/components/esp-dsp/CMakeLists.txt b/components/esp-dsp/CMakeLists.txt deleted file mode 100644 index e092c55..0000000 --- a/components/esp-dsp/CMakeLists.txt +++ /dev/null @@ -1,7 +0,0 @@ - -idf_component_register(SRCS "dsps_biquad_gen_f32.c" - "dsps_biquad_f32_ae32.S" - "dsps_dotprode_f32_ae32.S" - "dsps_biquad_f32_ansi.c" - "dsps_dotprode_f32_m_ae32.S" - INCLUDE_DIRS "include" ) diff --git a/components/esp-dsp/component.mk b/components/esp-dsp/component.mk deleted file mode 100644 index 0849d56..0000000 --- a/components/esp-dsp/component.mk +++ /dev/null @@ -1,11 +0,0 @@ -# -# Main Makefile. This is basically the same as a component makefile. -# -# This Makefile should, at the very least, just include $(SDK_PATH)/make/component_common.mk. By default, -# this will take the sources in the src/ directory, compile them and link them into -# lib(subdirectory_name).a in the build directory. This behaviour is entirely configurable, -# please read the ESP-IDF documents if you need to do this. -# - -COMPONENT_SRCDIRS := . -# CFLAGS += diff --git a/components/esp-dsp/dsps_biquad_f32_ae32.S b/components/esp-dsp/dsps_biquad_f32_ae32.S deleted file mode 100644 index 4e73e78..0000000 --- a/components/esp-dsp/dsps_biquad_f32_ae32.S +++ /dev/null @@ -1,86 +0,0 @@ -// Copyright 2018-2019 Espressif Systems (Shanghai) PTE LTD -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. - -#include "./dsps_dotprode_f32_m_ae32.S" - -// This is bi quad filter form II for ESP32 processor. - .text - .align 4 - .global dsps_biquad_f32_ae32 - .type dsps_biquad_f32_ae32,@function -// The function implements the following C code: -//esp_err_t dsps_biquad_f32_ae32(const float* input, float* output, int len, float* coef, float* w) -// { -// for (int i=0 ; i< len ; i++) -// { -// float d0 = input[i] - coef[3]*w[0] - coef[4]*w[1]; (input[i] - a[1]*w[0] - a[2]*w[1];) -// output[i] = coef[0]*d0 + coef[1]*w[0] + coef[2]*w[1]; -// w[1] = w[0]; -// w[0] = d0; -// } -// return ESP_OK; -// } - -dsps_biquad_f32_ae32: -// input - a2 -// output - a3 -// len - a4 -// coeffs - a5 -// w- a6 - -// f0 - b0 -// f1 - b1 -// f2 - b2 -// f3 - a1 -// f4 - a2 - -// f5 - w0 -// f6 - w1 - - entry a1, 16 - // Array increment for floating point data should be 4 - lsi f0, a5, 0 - lsi f1, a5, 4 - lsi f2, a5, 8 - lsi f3, a5, 12 - lsi f4, a5, 16 - - - neg.s f5, f3 // -a[1] - neg.s f6, f4 // -a[2] - - lsi f7, a6, 0 // w[0] - lsi f8, a6, 4 // w[1] - - addi a3, a3, -4 // i-- // preset a3 - lsi f9, a2, 0 // f9 = x[i] - loopnez a4, loop_bq_end_m_ae32 - madd.s f9, f7, f5 // f9 += -a1*w0 - addi a3, a3, 4 // out++; - mul.s f10, f1, f7 // f10 = b1*w0 - madd.s f9, f8, f6 // f9 += -a2*w1 - madd.s f10, f9, f0 // f10 += b0*d0 - addi a2, a2, 4 // in++; - madd.s f10, f2, f8 // f10+= b2*w1, f10 - result - mov.s f8, f7 // w1 = w0 - mov.s f7, f9 // w0 = d0 - lsi f9, a2, 0 // f9 = x[i] - ssi f10, a3, 0 // y[i] = result -loop_bq_end_m_ae32: - // Store delay line - ssi f7, a6, 0 - ssi f8, a6, 4 - - movi.n a2, 0 // return status ESP_OK - retw.n diff --git a/components/esp-dsp/dsps_biquad_f32_ansi.c b/components/esp-dsp/dsps_biquad_f32_ansi.c deleted file mode 100644 index 9221698..0000000 --- a/components/esp-dsp/dsps_biquad_f32_ansi.c +++ /dev/null @@ -1,28 +0,0 @@ -// Copyright 2018-2019 Espressif Systems (Shanghai) PTE LTD -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. - - -#include "dsps_biquad.h" - - -esp_err_t dsps_biquad_f32_ansi(const float *input, float *output, int len, float *coef, float *w) -{ - for (int i = 0 ; i < len ; i++) { - float d0 = input[i] - coef[3] * w[0] - coef[4] * w[1]; - output[i] = coef[0] * d0 + coef[1] * w[0] + coef[2] * w[1]; - w[1] = w[0]; - w[0] = d0; - } - return ESP_OK; -} diff --git a/components/esp-dsp/dsps_biquad_gen_f32.c b/components/esp-dsp/dsps_biquad_gen_f32.c deleted file mode 100644 index 282e629..0000000 --- a/components/esp-dsp/dsps_biquad_gen_f32.c +++ /dev/null @@ -1,290 +0,0 @@ -// Copyright 2018-2019 Espressif Systems (Shanghai) PTE LTD -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. - -#include "dsps_biquad_gen.h" -#include -#include "esp_log.h" - -esp_err_t dsps_biquad_gen_lpf_f32(float *coeffs, float f, float qFactor) -{ - if (qFactor <= 0.0001) { - qFactor = 0.0001; - } - float Fs = 1; - - float w0 = 2 * M_PI * f / Fs; - float c = cosf(w0); - float s = sinf(w0); - float alpha = s / (2 * qFactor); - - float b0 = (1 - c) / 2; - float b1 = 1 - c; - float b2 = b0; - float a0 = 1 + alpha; - float a1 = -2 * c; - float a2 = 1 - alpha; - - coeffs[0] = b0 / a0; - coeffs[1] = b1 / a0; - coeffs[2] = b2 / a0; - coeffs[3] = a1 / a0; - coeffs[4] = a2 / a0; - return ESP_OK; -} - -esp_err_t dsps_biquad_gen_hpf_f32(float *coeffs, float f, float qFactor) -{ - if (qFactor <= 0.0001) { - qFactor = 0.0001; - } - float Fs = 1; - - float w0 = 2 * M_PI * f / Fs; - float c = cosf(w0); - float s = sinf(w0); - float alpha = s / (2 * qFactor); - - float b0 = (1 + c) / 2; - float b1 = -(1 + c); - float b2 = b0; - float a0 = 1 + alpha; - float a1 = -2 * c; - float a2 = 1 - alpha; - - coeffs[0] = b0 / a0; - coeffs[1] = b1 / a0; - coeffs[2] = b2 / a0; - coeffs[3] = a1 / a0; - coeffs[4] = a2 / a0; - return ESP_OK; -} - -esp_err_t dsps_biquad_gen_bpf_f32(float *coeffs, float f, float qFactor) -{ - if (qFactor <= 0.0001) { - qFactor = 0.0001; - } - float Fs = 1; - - float w0 = 2 * M_PI * f / Fs; - float c = cosf(w0); - float s = sinf(w0); - float alpha = s / (2 * qFactor); - - float b0 = s / 2; - float b1 = 0; - float b2 = -b0; - float a0 = 1 + alpha; - float a1 = -2 * c; - float a2 = 1 - alpha; - - coeffs[0] = b0 / a0; - coeffs[1] = b1 / a0; - coeffs[2] = b2 / a0; - coeffs[3] = a1 / a0; - coeffs[4] = a2 / a0; - return ESP_OK; -} - -esp_err_t dsps_biquad_gen_bpf0db_f32(float *coeffs, float f, float qFactor) -{ - if (qFactor <= 0.0001) { - qFactor = 0.0001; - } - float Fs = 1; - - float w0 = 2 * M_PI * f / Fs; - float c = cosf(w0); - float s = sinf(w0); - float alpha = s / (2 * qFactor); - - float b0 = alpha; - float b1 = 0; - float b2 = -alpha; - float a0 = 1 + alpha; - float a1 = -2 * c; - float a2 = 1 - alpha; - - coeffs[0] = b0 / a0; - coeffs[1] = b1 / a0; - coeffs[2] = b2 / a0; - coeffs[3] = a1 / a0; - coeffs[4] = a2 / a0; - return ESP_OK; -} - -esp_err_t dsps_biquad_gen_notch_f32(float *coeffs, float f, float gain, float qFactor) -{ - if (qFactor <= 0.0001) { - qFactor = 0.0001; - } - float Fs = 1; - - float A = sqrtf(pow(10, (double)gain / 20.0)); - float w0 = 2 * M_PI * f / Fs; - float c = cosf(w0); - float s = sinf(w0); - float alpha = s / (2 * qFactor); - - float b0 = 1 + alpha * A; - float b1 = -2 * c; - float b2 = 1 - alpha * A; - float a0 = 1 + alpha; - float a1 = -2 * c; - float a2 = 1 - alpha; - - coeffs[0] = b0 / a0; - coeffs[1] = b1 / a0; - coeffs[2] = b2 / a0; - coeffs[3] = a1 / a0; - coeffs[4] = a2 / a0; - return ESP_OK; -} - -esp_err_t dsps_biquad_gen_allpass360_f32(float *coeffs, float f, float qFactor) -{ - if (qFactor <= 0.0001) { - qFactor = 0.0001; - } - float Fs = 1; - - float w0 = 2 * M_PI * f / Fs; - float c = cosf(w0); - float s = sinf(w0); - float alpha = s / (2 * qFactor); - - float b0 = 1 - alpha; - float b1 = -2 * c; - float b2 = 1 + alpha; - float a0 = 1 + alpha; - float a1 = -2 * c; - float a2 = 1 - alpha; - - coeffs[0] = b0 / a0; - coeffs[1] = b1 / a0; - coeffs[2] = b2 / a0; - coeffs[3] = a1 / a0; - coeffs[4] = a2 / a0; - return ESP_OK; -} - -esp_err_t dsps_biquad_gen_allpass180_f32(float *coeffs, float f, float qFactor) -{ - if (qFactor <= 0.0001) { - qFactor = 0.0001; - } - float Fs = 1; - - float w0 = 2 * M_PI * f / Fs; - float c = cosf(w0); - float s = sinf(w0); - float alpha = s / (2 * qFactor); - - float b0 = 1 - alpha; - float b1 = -2 * c; - float b2 = 1 + alpha; - float a0 = 1 + alpha; - float a1 = -2 * c; - float a2 = 1 - alpha; - - coeffs[0] = b0 / a0; - coeffs[1] = b1 / a0; - coeffs[2] = b2 / a0; - coeffs[3] = a1 / a0; - coeffs[4] = a2 / a0; - return ESP_OK; -} - -esp_err_t dsps_biquad_gen_peakingEQ_f32(float *coeffs, float f, float qFactor) -{ - if (qFactor <= 0.0001) { - qFactor = 0.0001; - } - float Fs = 1; - - float w0 = 2 * M_PI * f / Fs; - float c = cosf(w0); - float s = sinf(w0); - float alpha = s / (2 * qFactor); - - float b0 = alpha; - float b1 = 0; - float b2 = -alpha; - float a0 = 1 + alpha; - float a1 = -2 * c; - float a2 = 1 - alpha; - - coeffs[0] = b0 / a0; - coeffs[1] = b1 / a0; - coeffs[2] = b2 / a0; - coeffs[3] = a1 / a0; - coeffs[4] = a2 / a0; - return ESP_OK; -} - -esp_err_t dsps_biquad_gen_lowShelf_f32(float *coeffs, float f, float gain, float qFactor) -{ - if (qFactor <= 0.0001) { - qFactor = 0.0001; - } - float Fs = 1; - - float A = sqrtf(pow(10, (double)gain / 20.0)); - float w0 = 2 * M_PI * f / Fs; - float c = cosf(w0); - float s = sinf(w0); - float alpha = s / (2 * qFactor); - - float b0 = A * ((A + 1) - (A - 1) * c + 2 * sqrtf(A) * alpha); - float b1 = 2 * A * ((A - 1) - (A + 1) * c); - float b2 = A * ((A + 1) - (A - 1) * c - 2 * sqrtf(A) * alpha); - float a0 = (A + 1) + (A - 1) * c + 2 * sqrtf(A) * alpha; - float a1 = -2 * ((A - 1) + (A + 1) * c); - float a2 = (A + 1) + (A - 1) * c - 2 * sqrtf(A) * alpha; - - coeffs[0] = b0 / a0; - coeffs[1] = b1 / a0; - coeffs[2] = b2 / a0; - coeffs[3] = a1 / a0; - coeffs[4] = a2 / a0; - return ESP_OK; -} - -esp_err_t dsps_biquad_gen_highShelf_f32(float *coeffs, float f, float gain, float qFactor) -{ - if (qFactor <= 0.0001) { - qFactor = 0.0001; - } - float Fs = 1; - - float A = sqrtf(pow(10, (double)gain / 20.0)); - float w0 = 2 * M_PI * f / Fs; - float c = cosf(w0); - float s = sinf(w0); - float alpha = s / (2 * qFactor); - - float b0 = A * ((A + 1) + (A - 1) * c + 2 * sqrtf(A) * alpha); - float b1 = -2 * A * ((A - 1) + (A + 1) * c); - float b2 = A * ((A + 1) + (A - 1) * c - 2 * sqrtf(A) * alpha); - float a0 = (A + 1) - (A - 1) * c + 2 * sqrtf(A) * alpha; - float a1 = 2 * ((A - 1) - (A + 1) * c); - float a2 = (A + 1) - (A - 1) * c - 2 * sqrtf(A) * alpha; - - coeffs[0] = b0 / a0; - coeffs[1] = b1 / a0; - coeffs[2] = b2 / a0; - coeffs[3] = a1 / a0; - coeffs[4] = a2 / a0; - return ESP_OK; -} diff --git a/components/esp-dsp/dsps_dotprode_f32_ae32.S b/components/esp-dsp/dsps_dotprode_f32_ae32.S deleted file mode 100644 index bd23969..0000000 --- a/components/esp-dsp/dsps_dotprode_f32_ae32.S +++ /dev/null @@ -1,59 +0,0 @@ -// Copyright 2018-2019 Espressif Systems (Shanghai) PTE LTD -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. - -#include "./dsps_dotprode_f32_m_ae32.S" - -// This is dot product function for ESP32 processor. - .text - .align 4 - .global dsps_dotprode_f32_ae32 - .type dsps_dotprode_f32_ae32,@function -// The function implements the following C code: -//esp_err_t dsps_dotprod_f32_ae32(const float* src1, const float* src2, float* dest, int len) -//{ -// float acc = 0; -// for (int i=0 ; i< len ; i++) -// { -// acc += src1[i]*src2[i]; -// } -// *dest = acc; -// return ESP_OK; -//} - -dsps_dotprode_f32_ae32: -// src1 - a2 -// src2 - a3 -// dest - a4 -// len - a5 -// step1- a6 -// step2- a7 - - entry a1, 16 - // Array increment for floating point data should be 4 - - slli a6,a6, 2 - slli a7,a7, 2 - // Clear initial state of the result register - movi.n a9, 0 - wfr f1, a9 - // a2 - input1 - // a3 - input2 - // a5 - length - // a6,a7, step in arrays - dotprode_f32_ae32 a2, a3, a5, a6, a7; - - ssi f1, a4, 0 // Store result from f1 to memory at a4 - - movi.n a2, 0 // return status ESP_OK - retw.n diff --git a/components/esp-dsp/dsps_dotprode_f32_m_ae32.S b/components/esp-dsp/dsps_dotprode_f32_m_ae32.S deleted file mode 100644 index b2ea4f7..0000000 --- a/components/esp-dsp/dsps_dotprode_f32_m_ae32.S +++ /dev/null @@ -1,41 +0,0 @@ -// Copyright 2018-2019 Espressif Systems (Shanghai) PTE LTD -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. - - -.macro dotprode_f32_ae32 x1 x2 count step1 step2 -// This macro calculates floating point dot product for count float samples -// x1, x2 - input arrays -// count - amount of samples -// step1,step2 - A register for array step. (should be divided by 4) -// f1 - contains initial value -// -// result in f1 -// -// Macros body: -// f1 += x1[i*step1]*x2[i*step2]; i: 0..counter-1 -// affected: f0, f1, f2 -// Example: dotprod_f32_ae32 a2 a3 a5 a8 a9 -// a8 == 4, step is 4 bytes -// a5 == 32, length of array is 32 -// - lsi f0, \x2, 0 - sub \x1, \x1, \step1 // To compensate first increment - loopnez \count, loop_mace_end_m_ae32 - add.n \x1, \x1, \step1 - lsi f2, \x1, 0 - madd.s f1, f2, f0 - add.n \x2, \x2, \step2 - lsi f0, \x2, 0 - loop_mace_end_m_ae32: -.endm diff --git a/components/esp-dsp/include/dsp_common.h b/components/esp-dsp/include/dsp_common.h deleted file mode 100644 index a772c39..0000000 --- a/components/esp-dsp/include/dsp_common.h +++ /dev/null @@ -1,42 +0,0 @@ -// Copyright 2018-2019 Espressif Systems (Shanghai) PTE LTD -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. - -#ifndef _dsp_common_H_ -#define _dsp_common_H_ -#include -#include -#include "dsp_err.h" - - -#ifdef __cplusplus -extern "C" -{ -#endif - -/** - * @brief check power of two - * The function check if the argument is power of 2. - * The implementation use ANSI C and could be compiled and run on any platform - * - * @return - * - true if x is power of two - * - false if no - */ -bool dsp_is_power_of_two(int x); - -#ifdef __cplusplus -} -#endif - -#endif // _dsp_common_H_ \ No newline at end of file diff --git a/components/esp-dsp/include/dsp_err.h b/components/esp-dsp/include/dsp_err.h deleted file mode 100644 index d769664..0000000 --- a/components/esp-dsp/include/dsp_err.h +++ /dev/null @@ -1,23 +0,0 @@ -// Copyright 2018-2019 Espressif Systems (Shanghai) PTE LTD -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. - - -#ifndef _DSP_ERR_H_ -#define _DSP_ERR_H_ - -#include "stdint.h" -#include "esp_err.h" -#include "dsp_err_codes.h" - -#endif // _DSP_ERR_H_ \ No newline at end of file diff --git a/components/esp-dsp/include/dsp_err_codes.h b/components/esp-dsp/include/dsp_err_codes.h deleted file mode 100644 index c882778..0000000 --- a/components/esp-dsp/include/dsp_err_codes.h +++ /dev/null @@ -1,27 +0,0 @@ -// Copyright 2018-2019 Espressif Systems (Shanghai) PTE LTD -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. - -#ifndef _dsp_error_codes_H_ -#define _dsp_error_codes_H_ - -#define DSP_OK 0 // For internal use only. Please use ESP_OK instead -#define ESP_ERR_DSP_BASE 0x70000 -#define ESP_ERR_DSP_INVALID_LENGTH (ESP_ERR_DSP_BASE + 1) -#define ESP_ERR_DSP_INVALID_PARAM (ESP_ERR_DSP_BASE + 2) -#define ESP_ERR_DSP_PARAM_OUTOFRANGE (ESP_ERR_DSP_BASE + 3) -#define ESP_ERR_DSP_UNINITIALIZED (ESP_ERR_DSP_BASE + 4) -#define ESP_ERR_DSP_REINITIALIZED (ESP_ERR_DSP_BASE + 5) - - -#endif // _dsp_error_codes_H_ \ No newline at end of file diff --git a/components/esp-dsp/include/dsp_tests.h b/components/esp-dsp/include/dsp_tests.h deleted file mode 100644 index 4b405d4..0000000 --- a/components/esp-dsp/include/dsp_tests.h +++ /dev/null @@ -1,27 +0,0 @@ -// Copyright 2018-2019 Espressif Systems (Shanghai) PTE LTD -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. - -#ifndef _DSP_TESTS_H_ -#define _DSP_TESTS_H_ - -#define TEST_ASSERT_EXEC_IN_RANGE(min_exec, max_exec, actual) \ - if (cycles >= max_exec) { \ - TEST_ASSERT_MESSAGE (false, "Exec time takes more than expected!");\ - }\ - if (cycles < min_exec) {\ - TEST_ASSERT_MESSAGE (false, "Exec time takes less then expected!");\ - } - - -#endif // _DSP_TESTS_H_ \ No newline at end of file diff --git a/components/esp-dsp/include/dsps_biquad.h b/components/esp-dsp/include/dsps_biquad.h deleted file mode 100644 index 33c8321..0000000 --- a/components/esp-dsp/include/dsps_biquad.h +++ /dev/null @@ -1,62 +0,0 @@ -// Copyright 2018-2019 Espressif Systems (Shanghai) PTE LTD -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. - - -#ifndef _dsps_biquad_H_ -#define _dsps_biquad_H_ - -#include "dsp_err.h" - - -#ifdef __cplusplus -extern "C" -{ -#endif - -/**@{*/ -/** - * @brief IIR filter - * - * IIR filter 2nd order direct form II (bi quad) - * The extension (_ansi) use ANSI C and could be compiled and run on any platform. - * The extension (_ae32) is optimized for ESP32 chip. - * - * @param[in] input: input array - * @param output: output array - * @param len: length of input and output vectors - * @param coef: array of coefficients. b0,b1,b2,a1,a2 - * expected that a0 = 1. b0..b2 - numerator, a0..a2 - denominator - * @param w: delay line w0,w1. Length of 2. - * @return - * - ESP_OK on success - * - One of the error codes from DSP library - */ -esp_err_t dsps_biquad_f32_ansi(const float *input, float *output, int len, float *coef, float *w); -esp_err_t dsps_biquad_f32_ae32(const float *input, float *output, int len, float *coef, float *w); -/**@}*/ - - -#ifdef __cplusplus -} -#endif - - -#ifdef CONFIG_DSP_OPTIMIZED -#define dsps_biquad_f32 dsps_biquad_f32_ae32 -#endif -#ifdef CONFIG_DSP_ANSI -#define dsps_biquad_f32 dsps_biquad_f32_ansi -#endif - -#endif // _dsps_biquad_H_ \ No newline at end of file diff --git a/components/esp-dsp/include/dsps_biquad_gen.h b/components/esp-dsp/include/dsps_biquad_gen.h deleted file mode 100644 index 45af7a2..0000000 --- a/components/esp-dsp/include/dsps_biquad_gen.h +++ /dev/null @@ -1,200 +0,0 @@ -// Copyright 2018-2019 Espressif Systems (Shanghai) PTE LTD -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. - -#ifndef _dsps_biquad_gen_H_ -#define _dsps_biquad_gen_H_ - -#include "dsp_err.h" - -#ifdef __cplusplus -extern "C" -{ -#endif - -// Common rules for all generated coefficients. -// The coefficients placed to the array as follows: -// coeffs[0] = b0; -// coeffs[1] = b1; -// coeffs[2] = b2; -// coeffs[3] = a1; -// coeffs[4] = a2; -// a0 - are not placed and expected always as == 1 - -/** - * @brief LPF IIR filter coefficients - * Coefficients for low pass 2nd order IIR filter (bi-quad) - * The implementation use ANSI C and could be compiled and run on any platform - * - * @param coeffs: result coefficients. b0,b1,b2,a1,a2, a0 are not placed to the array and expected by IIR as 1 - * @param f: filter cut off frequency in range of 0..0.5 (normalized to sample frequency) - * @param qFactor: Q factor of filter - * - * @return - * - ESP_OK on success - * - One of the error codes from DSP library - */ -esp_err_t dsps_biquad_gen_lpf_f32(float *coeffs, float f, float qFactor); - -/** - * @brief HPF IIR filter coefficients - * - * Coefficients for high pass 2nd order IIR filter (bi-quad) - * The implementation use ANSI C and could be compiled and run on any platform - * - * @param coeffs: result coefficients. b0,b1,b2,a1,a2, a0 are not placed to the array and expected by IIR as 1 - * @param f: filter cut off frequency in range of 0..0.5 (normalized to sample frequency) - * @param qFactor: Q factor of filter - * - * @return - * - ESP_OK on success - * - One of the error codes from DSP library - */ -esp_err_t dsps_biquad_gen_hpf_f32(float *coeffs, float f, float qFactor); - -/** - * @brief BPF IIR filter coefficients - * - * Coefficients for band pass 2nd order IIR filter (bi-quad) - * The implementation use ANSI C and could be compiled and run on any platform - * - * @param coeffs: result coefficients. b0,b1,b2,a1,a2, a0 are not placed to the array and expected by IIR as 1 - * @param f: filter center frequency in range of 0..0.5 (normalized to sample frequency) - * @param qFactor: Q factor of filter - * - * @return - * - ESP_OK on success - * - One of the error codes from DSP library - */ -esp_err_t dsps_biquad_gen_bpf_f32(float *coeffs, float f, float qFactor); - -/** - * @brief 0 dB BPF IIR filter coefficients - * - * Coefficients for band pass 2nd order IIR filter (bi-quad) with 0 dB gain in passband - * The implementation use ANSI C and could be compiled and run on any platform - * - * @param coeffs: result coefficients. b0,b1,b2,a1,a2, a0 are not placed to the array and expected by IIR as 1 - * @param f: filter center frequency in range of 0..0.5 (normalized to sample frequency) - * @param qFactor: Q factor of filter - * - * @return - * - ESP_OK on success - * - One of the error codes from DSP library - */ -esp_err_t dsps_biquad_gen_bpf0db_f32(float *coeffs, float f, float qFactor); - -/** - * @brief Notch IIR filter coefficients - * - * Coefficients for notch 2nd order IIR filter (bi-quad) - * The implementation use ANSI C and could be compiled and run on any platform - * - * @param coeffs: result coefficients. b0,b1,b2,a1,a2, a0 are not placed to the array and expected by IIR as 1 - * @param f: filter notch frequency in range of 0..0.5 (normalized to sample frequency) - * @param gain: gain in stopband in dB - * @param qFactor: Q factor of filter - * - * @return - * - ESP_OK on success - * - One of the error codes from DSP library - */ -esp_err_t dsps_biquad_gen_notch_f32(float *coeffs, float f, float gain, float qFactor); - -/** - * @brief Allpass 360 degree IIR filter coefficients - * - * Coefficients for all pass 2nd order IIR filter (bi-quad) with 360 degree phase shift - * The implementation use ANSI C and could be compiled and run on any platform - * - * @param coeffs: result coefficients. b0,b1,b2,a1,a2, a0 are not placed to the array and expected by IIR as 1 - * @param f: filter notch frequency in range of 0..0.5 (normalized to sample frequency) - * @param qFactor: Q factor of filter - * - * @return - * - ESP_OK on success - * - One of the error codes from DSP library - */ -esp_err_t dsps_biquad_gen_allpass360_f32(float *coeffs, float f, float qFactor); - -/** - * @brief Allpass 180 degree IIR filter coefficients - * - * Coefficients for all pass 2nd order IIR filter (bi-quad) with 180 degree phase shift - * The implementation use ANSI C and could be compiled and run on any platform - * - * @param coeffs: result coefficients. b0,b1,b2,a1,a2, a0 are not placed to the array and expected by IIR as 1 - * @param f: filter notch frequency in range of 0..0.5 (normalized to sample frequency) - * @param qFactor: Q factor of filter - * - * @return - * - ESP_OK on success - * - One of the error codes from DSP library - */ -esp_err_t dsps_biquad_gen_allpass180_f32(float *coeffs, float f, float qFactor); - -/** - * @brief peak IIR filter coefficients - * - * Coefficients for peak 2nd order IIR filter (bi-quad) - * The implementation use ANSI C and could be compiled and run on any platform - * - * @param coeffs: result coefficients. b0,b1,b2,a1,a2, a0 are not placed to the array and expected by IIR as 1 - * @param f: filter notch frequency in range of 0..0.5 (normalized to sample frequency) - * @param qFactor: Q factor of filter - * - * @return - * - ESP_OK on success - * - One of the error codes from DSP library - */ -esp_err_t dsps_biquad_gen_peakingEQ_f32(float *coeffs, float f, float qFactor); - -/** - * @brief low shelf IIR filter coefficients - * - * Coefficients for low pass Shelf 2nd order IIR filter (bi-quad) - * The implementation use ANSI C and could be compiled and run on any platform - * - * @param coeffs: result coefficients. b0,b1,b2,a1,a2, a0 are not placed to the array and expected by IIR as 1 - * @param f: filter notch frequency in range of 0..0.5 (normalized to sample frequency) - * @param gain: gain in stopband in dB - * @param qFactor: Q factor of filter - * - * @return - * - ESP_OK on success - * - One of the error codes from DSP library - */ -esp_err_t dsps_biquad_gen_lowShelf_f32(float *coeffs, float f, float gain, float qFactor); - -/** - * @brief high shelf IIR filter coefficients - * - * Coefficients for high pass Shelf 2nd order IIR filter (bi-quad) - * The implementation use ANSI C and could be compiled and run on any platform - * - * @param coeffs: result coefficients. b0,b1,b2,a1,a2, a0 are not placed to the array and expected by IIR as 1 - * @param f: filter notch frequency in range of 0..0.5 (normalized to sample frequency) - * @param gain: gain in stopband in dB - * @param qFactor: Q factor of filter - * - * @return - * - ESP_OK on success - * - One of the error codes from DSP library - */ -esp_err_t dsps_biquad_gen_highShelf_f32(float *coeffs, float f, float gain, float qFactor); - -#ifdef __cplusplus -} -#endif - -#endif // _dsps_biquad_gen_H_ \ No newline at end of file diff --git a/components/esp-dsp/include/dsps_dotprod.h b/components/esp-dsp/include/dsps_dotprod.h deleted file mode 100644 index 4a3d254..0000000 --- a/components/esp-dsp/include/dsps_dotprod.h +++ /dev/null @@ -1,105 +0,0 @@ -// Copyright 2018-2019 Espressif Systems (Shanghai) PTE LTD -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. - -#ifndef _DSPI_DOTPROD_H_ -#define _DSPI_DOTPROD_H_ - -#include "esp_log.h" -#include "dsp_err.h" - -#ifdef __cplusplus -extern "C" -{ -#endif -// These functions calculates dotproduct of two vectors. - -/**@{*/ -/** - * @brief dot product of two 16 bit vectors - * Dot product calculation for two signed 16 bit arrays: *dest += (src1[i] * src2[i]) >> (15-shift); i= [0..N) - * The extension (_ansi) use ANSI C and could be compiled and run on any platform. - * The extension (_ae32) is optimized for ESP32 chip. - * - * @param[in] src1 source array 1 - * @param[in] src2 source array 2 - * @param dest destination pointer - * @param[in] len length of input arrays - * @param[in] shift shift of the result. - * @return - * - ESP_OK on success - * - One of the error codes from DSP library - */ -esp_err_t dsps_dotprod_s16_ansi(const int16_t *src1, const int16_t *src2, int16_t *dest, int len, int8_t shift); -esp_err_t dsps_dotprod_s16_ae32(const int16_t *src1, const int16_t *src2, int16_t *dest, int len, int8_t shift); -/**@}*/ - - -/**@{*/ -/** - * @brief dot product of two float vectors - * Dot product calculation for two floating point arrays: *dest += (src1[i] * src2[i]); i= [0..N) - * The extension (_ansi) use ANSI C and could be compiled and run on any platform. - * The extension (_ae32) is optimized for ESP32 chip. - * - * @param[in] src1 source array 1 - * @param[in] src2 source array 2 - * @param dest destination pointer - * @param[in] len length of input arrays - * @return - * - ESP_OK on success - * - One of the error codes from DSP library - */ -esp_err_t dsps_dotprod_f32_ansi(const float *src1, const float *src2, float *dest, int len); -esp_err_t dsps_dotprod_f32_ae32(const float *src1, const float *src2, float *dest, int len); -/**@}*/ - -/**@{*/ -/** - * @brief dot product of two float vectors with step - * Dot product calculation for two floating point arrays: *dest += (src1[i*step1] * src2[i*step2]); i= [0..N) - * The extension (_ansi) use ANSI C and could be compiled and run on any platform. - * The extension (_ae32) is optimized for ESP32 chip. - * - * @param[in] src1 source array 1 - * @param[in] src2 source array 2 - * @param dest destination pointer - * @param[in] len length of input arrays - * @param[in] step1 step over elements in first array - * @param[in] step2 step over elements in second array - * @return - * - ESP_OK on success - * - One of the error codes from DSP library - */ -esp_err_t dsps_dotprode_f32_ansi(const float *src1, const float *src2, float *dest, int len, int step1, int step2); -esp_err_t dsps_dotprode_f32_ae32(const float *src1, const float *src2, float *dest, int len, int step1, int step2); -/**@}*/ - -#ifdef __cplusplus -} -#endif - -#ifdef CONFIG_DSP_OPTIMIZED -#define dsps_dotprod_s16 dsps_dotprod_s16_ae32 -#define dsps_dotprod_f32 dsps_dotprod_f32_ae32 -#define dsps_dotprode_f32 dsps_dotprode_f32_ae32 -#endif -#ifdef CONFIG_DSP_ANSI -#define dsps_dotprod_s16 dsps_dotprod_s16_ansi -#define dsps_dotprod_f32 dsps_dotprod_f32_ansi -#define dsps_dotprode_f32 dsps_dotprode_f32_ansi -#endif - - - -#endif // _DSPI_DOTPROD_H_ \ No newline at end of file diff --git a/components/esp-dsp/include/esp_dsp.h b/components/esp-dsp/include/esp_dsp.h deleted file mode 100644 index dc28839..0000000 --- a/components/esp-dsp/include/esp_dsp.h +++ /dev/null @@ -1,55 +0,0 @@ -// Copyright 2018-2019 Espressif Systems (Shanghai) PTE LTD -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. - -#ifndef _esp_dsp_H_ -#define _esp_dsp_H_ - -#ifdef __cplusplus -extern "C" -{ -#endif - -// Common includes -#include "dsp_common.h" - -// Signal processing -#include "dsps_dotprod.h" -#include "dsps_fir.h" -#include "dsps_biquad.h" -#include "dsps_biquad_gen.h" -#include "dsps_addc.h" -#include "dsps_mulc.h" -#include "dsps_wind_hann.h" - -#include "dsps_d_gen.h" -#include "dsps_h_gen.h" -#include "dsps_tone_gen.h" -#include "dsps_snr.h" -#include "dsps_sfdr.h" - -#include "dsps_fft2r.h" - -// Matrix operations -#include "dspm_mult.h" - -// Support functions -#include "dsps_view.h" - - -#ifdef __cplusplus -} -#endif - - -#endif // _esp_dsp_H_ \ No newline at end of file diff --git a/components/lightsnapcast/snapcast.c b/components/lightsnapcast/snapcast.c index 1bb1a78..ba66968 100644 --- a/components/lightsnapcast/snapcast.c +++ b/components/lightsnapcast/snapcast.c @@ -13,6 +13,12 @@ #include #include +#include "esp_log.h" +#include "esp_heap_caps.h" + +/* Logging tag */ +static const char *TAG = "libSNAPCAST"; + const int BASE_MESSAGE_SIZE = 26; const int TIME_MESSAGE_SIZE = 8; @@ -260,7 +266,11 @@ int wire_chunk_message_deserialize(wire_chunk_message_t *msg, const char *data, } // TODO maybe should check to see if need to free memory? + #if CONFIG_SPIRAM + msg->payload = (char *)heap_caps_malloc(msg->size * sizeof(char), MALLOC_CAP_SPIRAM); + #else msg->payload = malloc(msg->size * sizeof(char)); + #endif // Failed to allocate the memory if (!msg->payload) { return 2; @@ -306,4 +316,7 @@ int time_message_deserialize(time_message_t *msg, const char *data, uint32_t siz result |= buffer_read_int32(&buffer, &(msg->latency.usec)); return result; -} \ No newline at end of file +} + + + diff --git a/components/opus/CMakeLists.txt b/components/opus/CMakeLists.txt deleted file mode 100644 index 3788d46..0000000 --- a/components/opus/CMakeLists.txt +++ /dev/null @@ -1,20 +0,0 @@ -file(GLOB srcs "opus/src/*.c") -file(GLOB silk "opus/silk/*.c") -file(GLOB celt "opus/celt/*.c") -file(GLOB fixed "opus/slik/fixed/*.c") -file(GLOB float "opus/slik/float/*.c") - - -idf_component_register(SRCS "${srcs}" "${silk}" "${celt}" "${fixed}" "${float}" - INCLUDE_DIRS . - "opus/include" - "opus/silk" - "opus/silk/fixed" - "opus/silk/float" - "opus/celt" - ) - - -target_compile_definitions(${COMPONENT_TARGET} PRIVATE "-DHAVE_CONFIG_H") - - diff --git a/components/opus/component.mk b/components/opus/component.mk deleted file mode 100644 index 87ab8d4..0000000 --- a/components/opus/component.mk +++ /dev/null @@ -1,12 +0,0 @@ -# -# Main Makefile. This is basically the same as a component makefile. -# -# This Makefile should, at the very least, just include $(SDK_PATH)/make/component_common.mk. By default, -# this will take the sources in the src/ directory, compile them and link them into -# lib(subdirectory_name).a in the build directory. This behaviour is entirely configurable, -# please read the ESP-IDF documents if you need to do this. -# - -COMPONENT_SRCDIRS := opus/src opus/silk opus/silk/fixed opus/celt -COMPONENT_ADD_INCLUDEDIRS := . opus/include opus/silk opus/silk/fixed opus/celt -CFLAGS += -DHAVE_CONFIG_H diff --git a/components/opus/config.h b/components/opus/config.h deleted file mode 100644 index 2a9a0df..0000000 --- a/components/opus/config.h +++ /dev/null @@ -1,208 +0,0 @@ -/* config.h. Generated from config.h.in by configure. */ -/* config.h.in. Generated from configure.ac by autoheader. */ - -/* Get CPU Info by asm method */ -/* #undef CPU_INFO_BY_ASM */ - -/* Get CPU Info by c method */ -/* #undef CPU_INFO_BY_C */ - -/* Custom modes */ -/* #undef CUSTOM_MODES */ - -/* Do not build the float API */ -//#define DISABLE_FLOAT_API 1 - -/* Assertions */ -/* #undef ENABLE_ASSERTIONS */ - -/* Ambisonics Support */ -/* #undef ENABLE_EXPERIMENTAL_AMBISONICS */ - -/* Enable bitstream changes from draft-ietf-codec-opus-update */ -/* #undef ENABLE_UPDATE_DRAFT */ - -/* Debug fixed-point implementation */ -/* #undef FIXED_DEBUG */ - -/* Compile as fixed-point (for machines without a fast enough FPU) */ -#define FIXED_POINT 1 - -/* Float approximations */ -/* #undef FLOAT_APPROX */ - -/* Fuzzing */ -/* #undef FUZZING */ - -/* Define to 1 if you have the header file. */ -/* #undef HAVE_ALLOCA_H */ - -/* NE10 library is installed on host. Make sure it is on target! */ -/* #undef HAVE_ARM_NE10 */ - -/* Define to 1 if you have the header file. */ -/* #undef HAVE_DLFCN_H */ -#define HAVE_DLFCN_H 1 -/* Define to 1 if you have the header file. */ -#define HAVE_INTTYPES_H 1 - -/* Define to 1 if you have the `lrint' function. */ -/* #undef HAVE_LRINT */ -#define HAVE_LRINT 1 -/* Define to 1 if you have the `lrintf' function. */ -/* #undef HAVE_LRINTF */ -#define HAVE_LRINTF 1 -/* Define to 1 if you have the header file. */ -/* #undef HAVE_MEMORY_H */ -#define HAVE_MEMORY_H 1 -/* Define to 1 if you have the header file. */ -#define HAVE_STDINT_H 1 - -/* Define to 1 if you have the header file. */ -#define HAVE_STDLIB_H 1 - -/* Define to 1 if you have the header file. */ -#define HAVE_STRINGS_H 1 - -/* Define to 1 if you have the header file. */ -#define HAVE_STRING_H 1 - -/* Define to 1 if you have the header file. */ -#define HAVE_SYS_STAT_H 1 - -/* Define to 1 if you have the header file. */ -#define HAVE_SYS_TYPES_H 1 - -/* Define to 1 if you have the header file. */ -#define HAVE_UNISTD_H 1 - -/* Define to 1 if you have the `__malloc_hook' function. */ -/* #undef HAVE___MALLOC_HOOK */ - -/* Define to the sub-directory where libtool stores uninstalled libraries. */ -#define LT_OBJDIR ".libs/" - -/* Make use of ARM asm optimization */ -/* #undef OPUS_ARM_ASM */ - -/* Use generic ARMv4 inline asm optimizations */ -/* #undef OPUS_ARM_INLINE_ASM */ - -/* Use ARMv5E inline asm optimizations */ -/* #undef OPUS_ARM_INLINE_EDSP */ - -/* Use ARMv6 inline asm optimizations */ -/* #undef OPUS_ARM_INLINE_MEDIA */ - -/* Use ARM NEON inline asm optimizations */ -/* #undef OPUS_ARM_INLINE_NEON */ - -/* Define if assembler supports EDSP instructions */ -/* #undef OPUS_ARM_MAY_HAVE_EDSP */ - -/* Define if assembler supports ARMv6 media instructions */ -/* #undef OPUS_ARM_MAY_HAVE_MEDIA */ - -/* Define if compiler supports NEON instructions */ -/* #undef OPUS_ARM_MAY_HAVE_NEON */ - -/* Compiler supports ARMv7/Aarch64 Neon Intrinsics */ -/* #undef OPUS_ARM_MAY_HAVE_NEON_INTR */ - -/* Define if binary requires Aarch64 Neon Intrinsics */ -/* #undef OPUS_ARM_PRESUME_AARCH64_NEON_INTR */ - -/* Define if binary requires EDSP instruction support */ -/* #undef OPUS_ARM_PRESUME_EDSP */ - -/* Define if binary requires ARMv6 media instruction support */ -/* #undef OPUS_ARM_PRESUME_MEDIA */ - -/* Define if binary requires NEON instruction support */ -/* #undef OPUS_ARM_PRESUME_NEON */ - -/* Define if binary requires NEON intrinsics support */ -/* #undef OPUS_ARM_PRESUME_NEON_INTR */ - -/* This is a build of OPUS */ -#define OPUS_BUILD /**/ - -/* Run bit-exactness checks between optimized and c implementations */ -/* #undef OPUS_CHECK_ASM */ - -/* Use run-time CPU capabilities detection */ -/* #undef OPUS_HAVE_RTCD */ - -/* Compiler supports X86 AVX Intrinsics */ -/* #undef OPUS_X86_MAY_HAVE_AVX */ - -/* Compiler supports X86 SSE Intrinsics */ -/* #undef OPUS_X86_MAY_HAVE_SSE */ - -/* Compiler supports X86 SSE2 Intrinsics */ -/* #undef OPUS_X86_MAY_HAVE_SSE2 */ - -/* Compiler supports X86 SSE4.1 Intrinsics */ -/* #undef OPUS_X86_MAY_HAVE_SSE4_1 */ - -/* Define if binary requires AVX intrinsics support */ -/* #undef OPUS_X86_PRESUME_AVX */ - -/* Define if binary requires SSE intrinsics support */ -/* #undef OPUS_X86_PRESUME_SSE */ - -/* Define if binary requires SSE2 intrinsics support */ -/* #undef OPUS_X86_PRESUME_SSE2 */ - -/* Define if binary requires SSE4.1 intrinsics support */ -/* #undef OPUS_X86_PRESUME_SSE4_1 */ - -/* Define to the address where bug reports for this package should be sent. */ -#define PACKAGE_BUGREPORT "opus@xiph.org" - -/* Define to the full name of this package. */ -#define PACKAGE_NAME "opus" - -/* Define to the full name and version of this package. */ -#define PACKAGE_STRING "opus 1.3.1" - -/* Define to the one symbol short name of this package. */ -#define PACKAGE_TARNAME "opus" - -/* Define to the home page for this package. */ -#define PACKAGE_URL "" - -/* Define to the version of this package. */ -#define PACKAGE_VERSION "1.3.1" - -/* Define to 1 if you have the ANSI C header files. */ -#define STDC_HEADERS 1 - -/* Make use of alloca */ -/* #undef USE_ALLOCA */ - -/* Use C99 variable-size arrays */ -#define VAR_ARRAYS 1 - -/* Define to empty if `const' does not conform to ANSI C. */ -/* #undef const */ - -/* Define to `__inline__' or `__inline' if that's what the C compiler - calls it, or to nothing if 'inline' is not supported under any name. */ -#ifndef __cplusplus -/* #undef inline */ -#endif - -/* Define to the equivalent of the C99 'restrict' keyword, or to - nothing if this is not supported. Do not define if restrict is - supported directly. */ -#define restrict __restrict -/* Work around a bug in Sun C++: it does not support _Restrict or - __restrict__, even though the corresponding Sun C compiler ends up with - "#define restrict _Restrict" or "#define restrict __restrict__" in the - previous line. Perhaps some future version of Sun C++ will work with - restrict; if so, hopefully it defines __RESTRICT like Sun C does. */ -#if defined __SUNPRO_CC && !defined __RESTRICT -# define _Restrict -# define __restrict__ -#endif diff --git a/components/opus/opus b/components/opus/opus deleted file mode 160000 index 8aa7767..0000000 --- a/components/opus/opus +++ /dev/null @@ -1 +0,0 @@ -Subproject commit 8aa7767207b1e3633004c26aecbb67d1c5118485 diff --git a/components/rtprx/CMakeLists.txt b/components/rtprx/CMakeLists.txt deleted file mode 100644 index 89d8d96..0000000 --- a/components/rtprx/CMakeLists.txt +++ /dev/null @@ -1,3 +0,0 @@ -idf_component_register(SRCS "rtprx.c" - INCLUDE_DIRS "include" - REQUIRES opus) diff --git a/components/rtprx/component.mk b/components/rtprx/component.mk deleted file mode 100644 index bae802c..0000000 --- a/components/rtprx/component.mk +++ /dev/null @@ -1,12 +0,0 @@ -# -# Main Makefile. This is basically the same as a component makefile. -# -# This Makefile should, at the very least, just include $(SDK_PATH)/make/component_common.mk. By default, -# this will take the sources in the src/ directory, compile them and link them into -# lib(subdirectory_name).a in the build directory. This behaviour is entirely configurable, -# please read the ESP-IDF documents if you need to do this. -# - -COMPONENT_SRCDIRS := . -# CFLAGS += - diff --git a/components/rtprx/include/rtprx.h b/components/rtprx/include/rtprx.h deleted file mode 100644 index 3a2aea9..0000000 --- a/components/rtprx/include/rtprx.h +++ /dev/null @@ -1,11 +0,0 @@ - - -#ifndef _RTPRX_H_ -#define _RTPRX_H_ - -void rtp_rx_start(void); -void rtp_rx_stop(void); -void rtp_rx_task(void *pvParameters); -void setup_rtp_i2s(); - -#endif /* _RTPRX_H_ */ diff --git a/components/rtprx/rtprx.c b/components/rtprx/rtprx.c deleted file mode 100644 index 492003a..0000000 --- a/components/rtprx/rtprx.c +++ /dev/null @@ -1,169 +0,0 @@ -/** - * \file rtprx.c - * \author Jorgen Kragh Jakobsen - * \date 19.10.2019 - * \version 0.1 - * - * \brief RTP audio stream reciever - * - * \warning This software is a PROTOTYPE version and is not designed or intended for use in production, especially not for safety-critical applications! - * The user represents and warrants that it will NOT use or redistribute the Software for such purposes. - * This prototype is for research purposes only. This software is provided "AS IS," without a warranty of any kind. - */ -#include "rtprx.h" - -#include "freertos/FreeRTOS.h" -#include "esp_log.h" -#include "esp_wifi.h" -#include "esp_netif.h" - -#include "lwip/api.h" -#include "lwip/err.h" -#include "lwip/sockets.h" -#include "lwip/sys.h" -#include - -#include "driver/i2s.h" -#include "opus.h" - -//extern uint32_t sample_rate = 48000; xxx fixme - -static bool rtpRxState = 0; - -void rtp_rx_start() { - if (rtpRxState == 0 ) - { setup_rtp_i2s(); - xTaskCreate(rtp_rx_task, "RTPRx", 12*1024, NULL, 0, NULL); - rtpRxState = 1; - } -} - -void rtp_rx_stop() { - if (rtpRxState == 1) - { i2s_driver_uninstall(0); - //vTaskDelete(xTaskSignal); xxx Fix me - rtpRxState = 0; - } -} - - -void rtp_rx_task(void *pvParameters){ - OpusDecoder *decoder; - - //int size = opus_decoder_get_size(2); - int oe = 0; - decoder = opus_decoder_create(48000,2,&oe); - // int error = opus_decoder_init(decoder, 48000, 2); - printf("Initialized Decoder: %d", oe); - - //int32_t *audio32 = (int32_t*)malloc(960*sizeof(int32_t)); - int16_t *audio = (int16_t *)malloc(960*2*sizeof(int16_t)); - i2s_zero_dma_buffer(0); - static struct netconn *conn; - static struct netbuf *buf; - static uint32_t pkg = 0 ; - static uint32_t pkgerror = 0; - err_t err; - uint16_t oldseq = 1; - uint16_t first = 1; - conn = netconn_new(NETCONN_UDP); - if (conn!=NULL) - { printf("Net RTP RX\n"); - netconn_bind(conn, IP_ADDR_ANY, 1350); - netconn_listen(conn); - printf("Net RTP will enter loopn\n"); - while (1) { - netconn_recv(conn,&buf); - if (buf == NULL) - { printf("NETCONN RX error \n"); } - pkg++; - - uint8_t *p = (buf->p->payload); - uint16_t seq = (p[2]<<8)+p[3]; - if ( (seq!=oldseq+1) & (first != 1) ) - { printf("seq : %d, oldseq : %d \n",seq,oldseq); - uint16_t errors = seq-oldseq-1; - pkgerror = pkgerror + errors; - printf("ERROR --- Package drop : %d %d \n",errors, pkgerror); - size_t bWritten; - //for (int i = 0; i;i++ ) - int ret = i2s_write_expand(0, (char*)audio, 960*2*sizeof(int16_t),16,32, &bWritten, 100); - printf("bWritten : %d ret : %d \n ",bWritten,ret); - - //opus_pkg = NULL; - } - - if (seq \n", buf->p->len); - //printf("UDP package : %02x %02x %02x %02x\n",p[0],p[1],p[2],p[3]); - //printf("Timestamp : %02x %02x %02x %02x\n",p[4],p[5],p[6],p[7]); - //printf("Sync source : %02x %02x %02x %02x\n",p[8],p[9],p[10],p[11]); - //printf("R1 : %d \n",(p[12]&0xf8)>>3) ; - //int size = 240; - unsigned char *opus_pkg = buf->p->payload + 12; - int size = opus_decode(decoder, (unsigned char *)opus_pkg, buf->p->len-12, (opus_int16*)audio, 960, 0); - if (size < 0 ) - { printf("Decode error : %d \n",size); } - - //for (int i = 0; i < size*2; i++) { - // audio[i*2] = 0x0000; - // audio[i*2+1] = 0x0000; - //} - - size_t bWritten; - int ret = i2s_write_expand(0, (char*)audio, size*2*sizeof(int16_t),16,32, &bWritten, 100); - if (ret != 0 ) printf("Error I2S written: %d %d %d \n",ret, size*2*sizeof(int16_t) ,bWritten); - - if ((pkg%1000)==1) { - //printf("I2S written: %d %d \n", size*sizeof(int32_t) ,bWritten); - printf("%d > %d %d %d\n",pkg, size, buf->p->len, buf->p->tot_len ); - printf("UDP package len : %d -> \n", buf->p->len); - printf("UDP package : %02x %02x %02x %02x\n",p[0],p[1],p[2],p[3]); - printf("Timestamp : %02x %02x %02x %02x\n",p[4],p[5],p[6],p[7]); - printf("Sync source : %02x %02x %02x %02x\n",p[8],p[9],p[10],p[11]); - printf("R1 : %d \n",(p[12]&0xf8)>>3) ; - - for (int i=0;i<8;i++) - printf("%02d %04x %04x\n",i,audio[2*i],audio[2*i+1]); - } - - //netbuf_free(buf); - netbuf_delete(buf); - } - } - netconn_close(conn); - netconn_delete(conn); -} - -void setup_rtp_i2s() -{ - i2s_config_t i2s_config = { - .mode = I2S_MODE_MASTER | I2S_MODE_TX, // Only TX - .sample_rate = 48000, - .bits_per_sample = 32, - .channel_format = I2S_CHANNEL_FMT_RIGHT_LEFT, //2-channels - .communication_format = I2S_COMM_FORMAT_I2S, - .dma_buf_count = 8, - .dma_buf_len = 480, - //.intr_alloc_flags = 1, //Default interrupt priority - .use_apll = true, - .fixed_mclk = 0, - .tx_desc_auto_clear = true //Auto clear tx descriptor on underflow - }; - - i2s_driver_install(0, &i2s_config, 0, NULL); - i2s_zero_dma_buffer(0); - - i2s_pin_config_t pin_config = { - .bck_io_num = 12, //CONFIG_EXAMPLE_I2S_BCK_PIN, - .ws_io_num = 13, //CONFIG_EXAMPLE_I2S_LRCK_PIN, - .data_out_num = 14, //CONFIG_EXAMPLE_I2S_DATA_PIN, - .data_in_num = -1 //Not used - }; - - i2s_set_pin(0, &pin_config); - printf("Here... set pin\n"); -} diff --git a/main/CMakeLists.txt b/main/CMakeLists.txt index 8a9d914..e6c20ac 100644 --- a/main/CMakeLists.txt +++ b/main/CMakeLists.txt @@ -1,2 +1,8 @@ -idf_component_register(SRCS "main.c" - INCLUDE_DIRS ".") +# Edit following two lines to set component requirements (see docs) +set(COMPONENT_REQUIRES ) +set(COMPONENT_PRIV_REQUIRES ) + +set(COMPONENT_SRCS "main.c") +set(COMPONENT_ADD_INCLUDEDIRS "") + +register_component() diff --git a/main/Kconfig.projbuild b/main/Kconfig.projbuild new file mode 100644 index 0000000..5313737 --- /dev/null +++ b/main/Kconfig.projbuild @@ -0,0 +1,14 @@ +# put here your custom config value +menu "Access Point configuration" +config ESP_WIFI_SSID + string "WiFi SSID" + default "myssid" + help + SSID (network name) for the example to connect to. + +config ESP_WIFI_PASSWORD + string "WiFi Password" + default "mypassword" + help + WiFi password (WPA or WPA2) for the example to use. +endmenu diff --git a/main/component.mk b/main/component.mk deleted file mode 100644 index a98f634..0000000 --- a/main/component.mk +++ /dev/null @@ -1,4 +0,0 @@ -# -# "main" pseudo-component makefile. -# -# (Uses default behaviour of compiling all source files in directory, adding 'include' to include path.) diff --git a/main/main.c b/main/main.c index 4e7f99d..c3710d3 100644 --- a/main/main.c +++ b/main/main.c @@ -1,24 +1,29 @@ -/* Play flac file by audio pipeline - This example code is in the Public Domain (or CC0 licensed, at your option.) - Unless required by applicable law or agreed to in writing, this - software is distributed on an "AS IS" BASIS, WITHOUT WARRANTIES OR - CONDITIONS OF ANY KIND, either express or implied. -*/ - #include + #include "freertos/FreeRTOS.h" #include "freertos/task.h" #include "freertos/event_groups.h" -#include "esp_system.h" -#include "esp_wifi.h" -#include "esp_event.h" +#include "freertos/semphr.h" + #include "esp_log.h" +#include "sdkconfig.h" +#include "esp_wifi.h" +#include "esp_system.h" +#include "esp_event.h" #include "nvs_flash.h" -//ESP-IDF stuff +#include "audio_element.h" +#include "audio_pipeline.h" +#include "audio_event_iface.h" +#include "i2s_stream.h" +#include "raw_stream.h" +#include "mp3_decoder.h" +#include "flac_decoder.h" + +#include "esp_peripherals.h" +#include "periph_spiffs.h" #include "board.h" -#include "es8388.h" -//#include "audio_hal.h" +//#include "es8388.h" #include "lwip/err.h" #include "lwip/sockets.h" @@ -27,19 +32,61 @@ #include "lwip/dns.h" #include "mdns.h" #include "esp_sntp.h" -#include "opus.h" -#include "driver/i2s.h" -#include "rtprx.h" -#include "MerusAudio.h" -#include "dsp_processor.h" + #include "snapcast.h" +//#include "driver/timer.h" + #include +#define CONFIG_USE_SNTP 0 + +#define DAC_OUT_BUFFER_TIME_US 3 * 1526LL //TODO: not sure about this... // @48kHz, 16bit samples, 2 channels and a DMA buffer length of 300 Byte and 3 buffers. 300 Byte / (48000 * 2 Byte * 2 channels) + +static const char *TAG = "SNAPCLIENT"; + +static int sntp_synced = 0; + +char *codecString = NULL; + +// configMAX_PRIORITIES - 1 + +// TODO: what are the best values here? +#define SYNC_TASK_PRIORITY 6 +#define SYNC_TASK_CORE_ID 1 + +#define HTTP_TASK_PRIORITY 1 +#define HTTP_TASK_CORE_ID 0 + +#define I2S_TASK_PRIORITY 0 +#define I2S_TASK_CORE_ID 1 + +#define AGE_THRESHOLD 50LL // in µs + + +#define WIRE_CHNK_QUEUE_LENGTH 50 // TODO: one chunk is hardcoded to 20ms, change it to be dynamically adjustable. 1s buffer = 50 +static StaticQueue_t wireChunkQueue; +uint8_t wireChunkQueueStorageArea[ WIRE_CHNK_QUEUE_LENGTH * sizeof(wire_chunk_message_t *) ]; + +typedef struct snapcast_sync_task_cfg_s { + QueueHandle_t *sync_queue_handle; + audio_element_handle_t *p_raw_stream_reader; + int64_t outputBufferDacTime_us; + int64_t buffer_us; +} snapcast_sync_task_cfg_t; + +SemaphoreHandle_t diffBufSemaphoreHandle = NULL; + +static struct timeval diffToServer = {0, 0}; // median diff to server in µs +static struct timeval diffBuf[50] = {0}; // collected diff's to server +//static struct timeval *medianArray = NULL; // temp median calculation data is stored at this location +static struct timeval medianArray[50] = {0}; // temp median calculation data is stored at this location +static int indexOldest = 0; + xQueueHandle i2s_queue; -uint32_t buffer_ms = 400; +uint32_t buffer_ms = 400; uint8_t muteCH[4] = {0}; -audio_board_handle_t board_handle = NULL; +audio_board_handle_t board_handle; /* The examples use simple WiFi configuration that you can set via 'make menuconfig'. If you'd rather not, just change the below entries to strings with @@ -47,13 +94,13 @@ audio_board_handle_t board_handle = NULL; */ /* Constants that aren't configurable in menuconfig */ -#define HOST "192.168.1.158" +#define HOST "192.168.1.6" #define PORT 1704 #define BUFF_LEN 4000 -unsigned int addr; -uint32_t port = 0; +unsigned int addr; +uint32_t port = 0; /* Logging tag */ -static const char *TAG = "SNAPCAST"; +//static const char *TAG = "SNAPCAST"; /* FreeRTOS event group to signal when we are connected & ready to make a request */ //static EventGroupHandle_t wifi_event_group; @@ -113,8 +160,9 @@ void wifi_init_sta(void) wifi_config_t wifi_config = { .sta = { - .ssid = "drk-super", - .password = "12341234" + .ssid = CONFIG_ESP_WIFI_SSID, + .password = CONFIG_ESP_WIFI_PASSWORD, + .bssid_set = false }, }; ESP_ERROR_CHECK(esp_wifi_set_mode(WIFI_MODE_STA) ); @@ -134,9 +182,9 @@ void wifi_init_sta(void) /* xEventGroupWaitBits() returns the bits before the call returned, hence we can test which event actually * happened. */ if (bits & WIFI_CONNECTED_BIT) { - ESP_LOGI(TAG, "connected to ap SSID:kontor password:1234"); + ESP_LOGI(TAG, "connected to ap"); } else if (bits & WIFI_FAIL_BIT) { - ESP_LOGI(TAG, "Failed to connect to SSID:kontor, password:1234..."); + ESP_LOGI(TAG, "Failed to connect to AP ..."); } else { ESP_LOGE(TAG, "UNEXPECTED EVENT"); } @@ -206,8 +254,358 @@ void find_mdns_service(const char * service_name, const char * proto) mdns_query_results_free(r); } -static void http_get_task(void *pvParameters) -{ +/** + * + */ +void QuickSort(struct timeval *a, int left, int right) { + int i = left; + int j = right; + struct timeval temp = a[i]; + + if( left < right ) { + while(i < j) { + while(timercmp(&a[j], &temp, >=) && (i < j)) { + j--; + } + a[i] = a[j]; + + while(timercmp(&a[j], &temp, <=) && (i < j)) { + i++; + } + a[j] = a[i]; + } + a[i] = temp; + + QuickSort( a, left, i - 1 ); + QuickSort( a, j + 1, right ); + } +} + + +/** + * + */ +// TODO: find better implementation. Could be a performance issue? +int8_t get_median( const struct timeval *tDiff, size_t n, struct timeval *result ) { + struct timeval median = {0 , 0}; + int i, j; + + if (tDiff == NULL) { + ESP_LOGE(TAG, "get_median: buffer error"); + + return -1; + } + + if (n == 0) { + median = tDiff[0]; + *result = median; + + return 0; + } + + memcpy( medianArray, tDiff, sizeof(struct timeval) * n ); // TODO: how to avoid this copy? + QuickSort(medianArray, 0, n); + +// if( (n % 2) == 0 ) { +// // if there is an even number of elements, return mean of the two elements in the middle +// timeradd(&medianArray[n/2], &medianArray[n/2 - 1], &median); +// if ((median.tv_sec / 2) == 0) { +// median.tv_sec = 0; +// median.tv_usec = (suseconds_t)((int64_t)median.tv_sec * 1000000LL / 2) + median.tv_usec / 2; +// } +// else +// { +// median.tv_sec /= 2; +// median.tv_usec /= 2; +// } +// } +// else + { + // else return the element in the middle + median = medianArray[n/2]; + } + + *result = median; + + return 0; +} + +/** + * + */ +// TODO: find a better way to do this! Especially the initialization/reset part +int8_t set_diff_to_server( struct timeval *tDiff, size_t n, uint8_t *index ) { + int8_t ret = -1; + struct timeval diff, now; + struct timeval tmpDiffToServer; + static struct timeval lastTimeSync = { 0, 0 }; + static uint8_t bufferFull = false; + size_t len; + int i; + + if (diffBufSemaphoreHandle == NULL) { + ESP_LOGE(TAG, "set_diff_to_server: mutex handle == NULL"); + + return -1; + } + + // get current time + if (gettimeofday(&now, NULL)) { + ESP_LOGE(TAG, "set_diff_to_server: Failed to get time of day"); + + return -1; + } + + // clear diffBuffer if last update is older than a minute + diff.tv_sec = now.tv_sec - lastTimeSync.tv_sec; + diff.tv_usec = now.tv_usec - lastTimeSync.tv_usec; + if ( diff.tv_sec > 60 ) { + ESP_LOGW(TAG, "Last time sync older than a minute. Clearing time buffer"); + + for (i=0; i= (n - 1)) && (bufferFull == false)) { + bufferFull = true; + } + + // store current time for next run + lastTimeSync.tv_sec = now.tv_sec; + lastTimeSync.tv_usec = now.tv_usec; + + if (bufferFull == true) { + len = n; + } + else { + len = *index; + } + + //ESP_LOGI(TAG, "set_diff_to_server: index: %d, bufferFull %d", *index, bufferFull); + + ret = get_median(tDiff, len, &tmpDiffToServer); + if (ret < 0) { + ESP_LOGW(TAG, "set_diff_to_server: get median failed"); + } + + if (xSemaphoreTake( diffBufSemaphoreHandle, 1 ) == pdFALSE) { + ESP_LOGW(TAG, "set_diff_to_server: can't take semaphore"); + + return -1; + } + + diffToServer = tmpDiffToServer; + + xSemaphoreGive( diffBufSemaphoreHandle ); + + return ret; +} + +/** + * + */ +int8_t get_diff_to_server( struct timeval *tDiff ) { + static struct timeval lastDiff = { 0, 0 }; + + if (diffBufSemaphoreHandle == NULL) { + return -1; + } + + if (xSemaphoreTake( diffBufSemaphoreHandle, 0 ) == pdFALSE) { + *tDiff = lastDiff; + + ESP_LOGW(TAG, "get_diff_to_server: can't take semaphore. Old diff retreived"); + + return -2; + } + + *tDiff = diffToServer; + lastDiff = diffToServer; // store value, so we can return a value if semaphore couldn't be taken + + xSemaphoreGive( diffBufSemaphoreHandle ); + + return 0; +} + +/** + * + */ +int8_t server_now( struct timeval *sNow ) { + struct timeval now; + struct timeval diff; + + // get current time + if (gettimeofday(&now, NULL)) { + ESP_LOGE(TAG, "server_now: Failed to get time of day"); + + return -1; + } + + if (get_diff_to_server(&diff) == -1) { + ESP_LOGE(TAG, "server_now: can't get diff to server"); + + return -1; + } + + if ((diff.tv_sec == 0) && (diff.tv_usec == 0)) { + ESP_LOGW(TAG, "server_now: diff to server not initialized yet"); + + return -1; + } + +// ESP_LOGI(TAG, "now: %lldus", (int64_t)now.tv_sec * 1000000LL + (int64_t)now.tv_usec); +// ESP_LOGI(TAG, "diff: %lldus", (int64_t)diff.tv_sec * 1000000LL + (int64_t)diff.tv_usec); + + timeradd(&now, &diff, sNow); + +// ESP_LOGI(TAG, "serverNow: %lldus", (int64_t)sNow->tv_sec * 1000000LL + (int64_t)sNow->tv_usec); + + return 0; +} + + +static void snapcast_sync_task(void *pvParameters) { + snapcast_sync_task_cfg_t *taskCfg = (snapcast_sync_task_cfg_t *)pvParameters; + wire_chunk_message_t *wireChnk = NULL; + struct timeval serverNow = {0, 0}; + int64_t age; + BaseType_t ret; + uint8_t initial_sync = 0; + + ESP_LOGI(TAG, "started sync task"); + +// ESP_LOGI(TAG, "tvAgeCompare1: %fms", (float)tvAgeCompare1.tv_sec * 1000.0 + (float)tvAgeCompare1.tv_usec / 1000.0); +// ESP_LOGI(TAG, "tvAgeCompare2: %fms", (float)tvAgeCompare2.tv_sec * 1000.0 + (float)tvAgeCompare2.tv_usec / 1000.0); +// ESP_LOGI(TAG, "tvAgeCompare3: %fms", (float)tvAgeCompare3.tv_sec * 1000.0 + (float)tvAgeCompare3.tv_usec / 1000.0); +// ESP_LOGI(TAG, "tvAgeCompare4: %fms", (float)tvAgeCompare4.tv_sec * 1000.0 + (float)tvAgeCompare4.tv_usec / 1000.0); + + while(1) { + if (wireChnk == NULL) { + ret = xQueueReceive( *(taskCfg->sync_queue_handle), &wireChnk, portMAX_DELAY ); + } + else { + ret = pdPASS; + } + + if( ret == pdPASS ) { + if (initial_sync > 5) { + if (server_now(&serverNow) >= 0) { + age = ((int64_t)serverNow.tv_sec * 1000000LL + (int64_t)serverNow.tv_usec) - + ((int64_t)wireChnk->timestamp.sec * 1000000LL + (int64_t)wireChnk->timestamp.usec) - + (int64_t)taskCfg->buffer_us + + (int64_t)taskCfg->outputBufferDacTime_us; + + //ESP_LOGI(TAG, "before age: %lldus", age); + if (age < -(int64_t)taskCfg->buffer_us / 10LL) { // if age gets younger than 1/10 of buffer then do a hard resync + initial_sync = 0; + + ESP_LOGI(TAG, "need resync, skipping chnk. age: %lldus", age); + + wire_chunk_message_free(wireChnk); + free(wireChnk); + wireChnk = NULL; + + continue; + } + else if (age < -1099LL) { + vTaskDelay((TickType_t)(-age / 1000LL)); // TODO: find better way to do a exact delay to age, skipping probably goes away afterwards + } + else if (age > 0) { + ESP_LOGI(TAG, "skipping chunk, age: %lldus", age); + + wire_chunk_message_free(wireChnk); + free(wireChnk); + wireChnk = NULL; + + continue; + } + } + +// // just for testing, print age +// if (server_now(&serverNow) >= 0) { +// age = ((int64_t)serverNow.tv_sec * 1000000LL + (int64_t)serverNow.tv_usec) - +// ((int64_t)wireChnk->timestamp.sec * 1000000LL + (int64_t)wireChnk->timestamp.usec) - +// (int64_t)taskCfg->buffer_us + +// (int64_t)taskCfg->outputBufferDacTime_us; +// +// ESP_LOGI(TAG, "after age: %lldus", age); +// } + + raw_stream_write(*(taskCfg->p_raw_stream_reader), wireChnk->payload, wireChnk->size); + + wire_chunk_message_free(wireChnk); + free(wireChnk); + wireChnk = NULL; + } + else if (server_now(&serverNow) >= 0) + { + // calc age in µs + age = ((int64_t)serverNow.tv_sec * 1000000LL + (int64_t)serverNow.tv_usec) - + ((int64_t)wireChnk->timestamp.sec * 1000000LL + (int64_t)wireChnk->timestamp.usec) - + (int64_t)taskCfg->buffer_us + + (int64_t)taskCfg->outputBufferDacTime_us; + +// ESP_LOGI(TAG, "age: %lldus, %lldus, %lldus, %lldus, %lldus", age, +// (int64_t)serverNow.tv_sec * 1000000LL + (int64_t)serverNow.tv_usec, +// (int64_t)wireChnk->timestamp.sec * 1000000LL + (int64_t)wireChnk->timestamp.usec, +// (int64_t)taskCfg->buffer_us, +// (int64_t)taskCfg->outputBufferDacTime_us); + + if (age < -(int64_t)taskCfg->buffer_us) { + // fast forward + ESP_LOGI(TAG, "fast forward, age: %lldus", age); + + wire_chunk_message_free(wireChnk); + free(wireChnk); + wireChnk = NULL; + } + else if ((age >= -AGE_THRESHOLD ) && ( age <= 0 )) { + initial_sync++; + + wire_chunk_message_free(wireChnk); + free(wireChnk); + wireChnk = NULL; + } + else if (age > 0 ) { + ESP_LOGI(TAG, "too old, age: %lldus", age); + + initial_sync = 0; + + wire_chunk_message_free(wireChnk); + free(wireChnk); + wireChnk = NULL; + } + } + } + } +} + + +/** + * + */ +static void http_get_task(void *pvParameters) { + audio_element_handle_t *p_raw_stream_reader = (audio_element_handle_t *)pvParameters; struct sockaddr_in servaddr; char *start; int sockfd; @@ -216,28 +614,33 @@ static void http_get_task(void *pvParameters) int result, size, id_counter; struct timeval now, tv1, tv2, tv3, last_time_sync; time_message_t time_message; - double time_diff; + struct timeval tmpDiffToServer; + uint8_t diffBufCnt = 0; + QueueHandle_t wireChunkQueueHandle; + const int64_t outputBufferDacTime_us = DAC_OUT_BUFFER_TIME_US; // in ms + TaskHandle_t syncTask = NULL; + snapcast_sync_task_cfg_t snapcastTaskCfg; + + // create semaphore for time diff buffer to server + diffBufSemaphoreHandle = xSemaphoreCreateMutex(); last_time_sync.tv_sec = 0; last_time_sync.tv_usec = 0; - uint32_t old_usec = 0; - int32_t diff = 0; + id_counter = 0; - - OpusDecoder *decoder = NULL; - //int size = opus_decoder_get_size(2); - //int oe = 0; - //decoder = opus_decoder_create(48000,2,&oe); - // int error = opus_decoder_init(decoder, 48000, 2); - //printf("Initialized Decoder: %d", oe); - int16_t *audio = (int16_t *)malloc(960*2*sizeof(int16_t)); // 960*2: 20ms, 960*1: 10ms - int16_t pcm_size = 120; - uint16_t channels; + // create snapcast receive buffer + wireChunkQueueHandle = xQueueCreateStatic( WIRE_CHNK_QUEUE_LENGTH, + sizeof(wire_chunk_message_t *), + wireChunkQueueStorageArea, - dsp_i2s_task_init(48000,false); + &wireChunkQueue + ); while(1) { + memset((void *)diffBuf, 0, sizeof(diffBuf)); + diffBufCnt = 0; + /* Wait for the callback to set the CONNECTED_BIT in the event group. */ @@ -245,14 +648,14 @@ static void http_get_task(void *pvParameters) false, true, portMAX_DELAY); ESP_LOGI(TAG, "Connected to AP"); - // Find snapcast server + // Find snapcast server // Connect to first snapcast server found ESP_LOGI(TAG, "Enable mdns") ; mdns_init(); mdns_result_t * r = NULL; esp_err_t err = 0; while ( !r || err ) - { ESP_LOGI(TAG, "Lookup snapcast service on netowork"); + { ESP_LOGI(TAG, "Lookup snapcast service on network"); esp_err_t err = mdns_query_ptr("_snapcast", "_tcp", 3000, 20, &r); if(err){ ESP_LOGE(TAG, "Query Failed"); @@ -260,10 +663,10 @@ static void http_get_task(void *pvParameters) if(!r){ ESP_LOGW(TAG, "No results found!"); } - vTaskDelay(1000/portTICK_PERIOD_MS); - } + vTaskDelay(1000/portTICK_PERIOD_MS); + } ESP_LOGI(TAG,"Found %08x", r->addr->addr.u_addr.ip4.addr); - + servaddr.sin_family = AF_INET; servaddr.sin_addr.s_addr = r->addr->addr.u_addr.ip4.addr; // inet_addr("192.168.1.158"); servaddr.sin_port = htons(r->port); @@ -278,7 +681,7 @@ static void http_get_task(void *pvParameters) ESP_LOGI(TAG, "... allocated socket"); if (connect(sockfd, (struct sockaddr*)&servaddr, sizeof(servaddr)) != 0) { - ESP_LOGE(TAG, "... socket connect failed errno=%d", errno); + ESP_LOGE(TAG, "%s", strerror(errno)); close(sockfd); vTaskDelay(4000 / portTICK_PERIOD_MS); continue; @@ -287,7 +690,6 @@ static void http_get_task(void *pvParameters) ESP_LOGI(TAG, "... connected"); codec_header_message_t codec_header_message; - wire_chunk_message_t wire_chunk_message; server_settings_message_t server_settings_message; result = gettimeofday(&now, NULL); @@ -333,194 +735,265 @@ static void http_get_task(void *pvParameters) ESP_LOGI(TAG, "Failed to serialize base message\r\n"); return; } - + write(sockfd, base_message_serialized, BASE_MESSAGE_SIZE); write(sockfd, hello_message_serialized, base_message.size); free(hello_message_serialized); - int readcalls ; + for (;;) { size = 0; - readcalls = 0; + result = 0; while (size < BASE_MESSAGE_SIZE) { - result = read(sockfd, &(buff[size]), BASE_MESSAGE_SIZE - size); + result = recv(sockfd, &(buff[size]), BASE_MESSAGE_SIZE - size, MSG_DONTWAIT); if (result < 0) { - ESP_LOGI(TAG, "Failed to read from server: %d\r\n", result); - return; + break; + } size += result; } - result = gettimeofday(&now, NULL); - if (result) { - ESP_LOGI(TAG, "Failed to gettimeofday\r\n"); - return; + + // TODO: what about other errno possibilities? + if (errno == ENOTCONN) { + ESP_LOGI(TAG, "%s", strerror(errno)); + + break; // stop for(;;) will try to reconnect then } - result = base_message_deserialize(&base_message, buff, size); - if (result) { - ESP_LOGI(TAG, "Failed to read base message: %d\r\n", result); - return; - } - diff = (int32_t)(base_message.sent.usec-now.tv_usec)/1000 ; - if (diff < 0) - { diff = diff + 1000; } - //ESP_LOGI(TAG,"%d %d dif %d",base_message.sent.usec/1000,(int)now.tv_usec/1000, - // (int32_t)(base_message.sent.usec-now.tv_usec)/1000 ) ; - - //diff = (uint32_t)now.tv_usec-old_usec; - //if (diff < 0) - //{ diff = diff + 1000000; } - //ESP_LOGI(TAG,"%d %d %d %d",base_message.size, (uint32_t)now.tv_usec, old_usec, diff); - base_message.received.sec = now.tv_sec; - base_message.received.usec = now.tv_usec; - //ESP_LOGI(TAG,"%d %d : %d %d : %d %d",base_message.size, base_message.refersTo, - //base_message.sent.sec,base_message.sent.usec, - //base_message.received.sec,base_message.received.usec); - - old_usec = now.tv_usec; - start = buff; - size = 0; - while (size < base_message.size) { - result = read(sockfd, &(buff[size]), base_message.size - size); - if (result < 0) { - ESP_LOGI(TAG, "Failed to read from server: %d\r\n", result); - return; - } + if (result > 0) { + result = gettimeofday(&now, NULL); + //ESP_LOGI(TAG, "time of day: %ld %ld", now.tv_sec, now.tv_usec); + if (result) { + ESP_LOGI(TAG, "Failed to gettimeofday"); + continue; + } - size += result; + result = base_message_deserialize(&base_message, buff, size); + if (result) { + ESP_LOGI(TAG, "Failed to read base message: %d", result); + continue; + } + + base_message.received.usec = now.tv_usec; + // ESP_LOGI(TAG,"%d %d : %d %d : %d %d",base_message.size, base_message.refersTo, + // base_message.sent.sec,base_message.sent.usec, + // base_message.received.sec,base_message.received.usec); + + //ESP_LOGI(TAG,"Free Heap: %d", xPortGetFreeHeapSize()); + + start = buff; + size = 0; + while (size < base_message.size) { + result = read(sockfd, &(buff[size]), base_message.size - size); + if (result < 0) { + ESP_LOGI(TAG, "Failed to read from server: %d", result); + + break; + } + + size += result; + } + + if (result < 0) { + break; + } + + switch (base_message.type) { + case SNAPCAST_MESSAGE_CODEC_HEADER: + result = codec_header_message_deserialize(&codec_header_message, start, size); + if (result) { + ESP_LOGI(TAG, "Failed to read codec header: %d", result); + return; + } + + ESP_LOGI(TAG, "Received codec header message"); + + size = codec_header_message.size; + start = codec_header_message.payload; + + if (strcmp(codec_header_message.codec,"flac") == 0) { + // TODO: reset queue and free all memory (wirechunks + payload) if new codec header is received while stream session is ongoing + // something like the following will probably do the trick in a loop until queue is empty. get current queue size and empty it. + + //wire_chunk_message_t *wire_chunk_message + //wire_chunk_message_free(wire_chunk_message); + //free(wire_chunk_message); + //xQueueReset(wireChunkQueueHandle); // reset wire chunk queue + + raw_stream_write(*p_raw_stream_reader, codec_header_message.payload, size); + } + else if (strcmp(codec_header_message.codec,"opus") == 0) { + // TODO: NOT Implemented yet! + uint32_t rate; + memcpy(&rate, start+4,sizeof(rate)); + uint16_t bits; + memcpy(&bits, start+8,sizeof(bits)); + uint16_t channels; + memcpy(&channels, start+10,sizeof(channels)); + + ESP_LOGI(TAG, "Codec : %s not implemented yet", codec_header_message.codec); + + return; + + //ESP_LOGI(TAG, "Codec setting %d:%d:%d", rate,bits,channels); + } + else { + ESP_LOGI(TAG, "Codec : %s not supported", codec_header_message.codec); + ESP_LOGI(TAG, "Change encoder codec to flac in /etc/snapserver.conf on server"); + return; + } + + ESP_LOGI(TAG, "Codec : %s", codec_header_message.codec); + + if (codecString != NULL) { + free(codecString); + codecString = NULL; + } + codecString = (char *)calloc(strlen(codec_header_message.codec) + 1, sizeof(char)); + if (codecString == NULL) { + ESP_LOGW(TAG, "couldn't get memory for codec String"); + } + else { + strcpy(codecString, codec_header_message.codec); + } + + codec_header_message_free(&codec_header_message); + received_header = true; + + break; + + case SNAPCAST_MESSAGE_WIRE_CHUNK: + { + if (!received_header) { + continue; + } + + wire_chunk_message_t *wire_chunk_message = (wire_chunk_message_t *)malloc(sizeof(wire_chunk_message_t)); + if (wire_chunk_message == NULL) { + ESP_LOGI(TAG, "Failed to allocate memory for wire chunk"); + + break; + } + + result = wire_chunk_message_deserialize(wire_chunk_message, start, size); + if (result) { + ESP_LOGI(TAG, "Failed to read wire chunk: %d\r\n", result); + + wire_chunk_message_free(wire_chunk_message); + free(wire_chunk_message); + break; + } + + //ESP_LOGI(TAG, "wire chnk with size: %d, timestamp %d.%d", wire_chunk_message->size, wire_chunk_message->timestamp.sec, wire_chunk_message->timestamp.usec); + + if( xQueueSendToBack( wireChunkQueueHandle, (void *)&wire_chunk_message, ( TickType_t ) portMAX_DELAY) != pdPASS ) + { + ESP_LOGI(TAG, "Failed to post the message"); + + wire_chunk_message_free(wire_chunk_message); + free(wire_chunk_message); + } + + break; + } + + case SNAPCAST_MESSAGE_SERVER_SETTINGS: + // The first 4 bytes in the buffer are the size of the string. + // We don't need this, so we'll shift the entire buffer over 4 bytes + // and use the extra room to add a null character so cJSON can pares it. + memmove(start, start + 4, size - 4); + start[size - 3] = '\0'; + result = server_settings_message_deserialize(&server_settings_message, start); + if (result) { + ESP_LOGI(TAG, "Failed to read server settings: %d\r\n", result); + return; + } + // log mute state, buffer, latency + buffer_ms = server_settings_message.buffer_ms; + ESP_LOGI(TAG, "Buffer length: %d", server_settings_message.buffer_ms); + //ESP_LOGI(TAG, "Ringbuffer size:%d", server_settings_message.buffer_ms*48*4); + ESP_LOGI(TAG, "Latency: %d", server_settings_message.latency); + ESP_LOGI(TAG, "Mute: %d", server_settings_message.muted); + ESP_LOGI(TAG, "Setting volume: %d", server_settings_message.volume); + muteCH[0] = server_settings_message.muted; + muteCH[1] = server_settings_message.muted; + muteCH[2] = server_settings_message.muted; + muteCH[3] = server_settings_message.muted; + + ESP_LOGI(TAG, "syncing clock to server"); + tv1.tv_sec = base_message.sent.sec; + tv1.tv_usec = base_message.sent.usec; + settimeofday(&tv1, NULL); + + // Volume setting using ADF HAL abstraction + audio_hal_set_mute(board_handle->audio_hal, server_settings_message.muted); + audio_hal_set_volume(board_handle->audio_hal, server_settings_message.volume); + + if (syncTask == NULL) { + ESP_LOGI(TAG, "[ 8 ] Start snapcast_sync_task"); + + snapcastTaskCfg.sync_queue_handle = &wireChunkQueueHandle; + snapcastTaskCfg.p_raw_stream_reader = p_raw_stream_reader; + snapcastTaskCfg.outputBufferDacTime_us = outputBufferDacTime_us; + snapcastTaskCfg.buffer_us = (int64_t)buffer_ms * 1000LL; + xTaskCreatePinnedToCore(&snapcast_sync_task, "snapcast_sync_task", 4*4096, &snapcastTaskCfg, SYNC_TASK_PRIORITY, &syncTask, SYNC_TASK_CORE_ID); + } + + break; + + case SNAPCAST_MESSAGE_TIME: + result = time_message_deserialize(&time_message, start, size); + if (result) { + ESP_LOGI(TAG, "Failed to deserialize time message\r\n"); + return; + } + // ESP_LOGI(TAG, "BaseTX : %d %d ", base_message.sent.sec , base_message.sent.usec); + // ESP_LOGI(TAG, "BaseRX : %d %d ", base_message.received.sec , base_message.received.usec); + // ESP_LOGI(TAG, "baseTX->RX : %d s ", (base_message.received.sec - base_message.sent.sec)); + // ESP_LOGI(TAG, "baseTX->RX : %d ms ", (base_message.received.usec - base_message.sent.usec)/1000); + // ESP_LOGI(TAG, "Latency : %d.%d ", time_message.latency.sec, time_message.latency.usec/1000); + + // tv == server to client latency (s2c) + // time_message.latency == client to server latency(c2s) + // TODO the fact that I have to do this simple conversion means + // I should probably use the timeval struct instead of my own + tv1.tv_sec = base_message.received.sec; + tv1.tv_usec = base_message.received.usec; + tv3.tv_sec = base_message.sent.sec; + tv3.tv_usec = base_message.sent.usec; + timersub(&tv1, &tv3, &tv2); + tv1.tv_sec = time_message.latency.sec; + tv1.tv_usec = time_message.latency.usec; + + // tv1 == c2s: client to server + // tv2 == s2c: server to client + // ESP_LOGI(TAG, "c2s: %ld %ld", tv1.tv_sec, tv1.tv_usec); + // ESP_LOGI(TAG, "s2c: %ld %ld", tv2.tv_sec, tv2.tv_usec); + + timersub(&tv1, &tv2, &tmpDiffToServer); + if ((tmpDiffToServer.tv_sec / 2) == 0) { + tmpDiffToServer.tv_sec = 0; + tmpDiffToServer.tv_usec = (suseconds_t)((int64_t)tmpDiffToServer.tv_sec * 1000000LL / 2) + tmpDiffToServer.tv_usec / 2; + } + else + { + tmpDiffToServer.tv_sec /= 2; + tmpDiffToServer.tv_usec /= 2; + } + + //ESP_LOGI(TAG, "Current latency: %ld.%06ld", tmpDiffToServer.tv_sec, tmpDiffToServer.tv_usec); + + diffBuf[diffBufCnt++] = tmpDiffToServer; + if (diffBufCnt >= (sizeof(diffBuf)/sizeof(struct timeval))) { + diffBufCnt = 0; + } + + set_diff_to_server(diffBuf, sizeof(diffBuf) / sizeof(struct timeval), &diffBufCnt); + + break; + } } - switch (base_message.type) { - case SNAPCAST_MESSAGE_CODEC_HEADER: - result = codec_header_message_deserialize(&codec_header_message, start, size); - if (result) { - ESP_LOGI(TAG, "Failed to read codec header: %d\r\n", result); - return; - } - ESP_LOGI(TAG, "Received codec header message\r\n"); - - size = codec_header_message.size; - start = codec_header_message.payload; - if (strcmp(codec_header_message.codec,"opus") == 0) { - ESP_LOGI(TAG, "Codec : %s , Size: %d \n",codec_header_message.codec,size); - } else - { - ESP_LOGI(TAG, "Codec : %s not supported\n",codec_header_message.codec); - ESP_LOGI(TAG, "Change encoder codec to opus in /etc/snapserver.conf on server\n"); - return; - } - uint32_t rate; - memcpy(&rate, start+4,sizeof(rate)); - uint16_t bits; - memcpy(&bits, start+8,sizeof(bits)); - memcpy(&channels, start+10,sizeof(channels)); - ESP_LOGI(TAG, "Opus sampleformat: %d:%d:%d\n",rate,bits,channels); - int error = 0; - decoder = opus_decoder_create(rate,channels,&error); - if (error != 0) - { ESP_LOGI(TAG, "Failed to init opus coder"); } - ESP_LOGI(TAG, "Initialized opus Decoder: %d", error); - - codec_header_message_free(&codec_header_message); - received_header = true; - - break; - - case SNAPCAST_MESSAGE_WIRE_CHUNK: - if (!received_header) { - continue; - } - - result = wire_chunk_message_deserialize(&wire_chunk_message, start, size); - if (result) { - ESP_LOGI(TAG, "Failed to read wire chunk: %d\r\n", result); - return; - } - - //ESP_LOGI(TAG, "Received wire message\r\n"); - size = wire_chunk_message.size; - start = (wire_chunk_message.payload); - //ESP_LOGI(TAG, "size : %d\n",size); - - int frame_size = 0; - while ((frame_size = opus_decode(decoder, (unsigned char *)start, size, (opus_int16*)audio, - pcm_size/channels, 0)) == OPUS_BUFFER_TOO_SMALL) - { pcm_size = pcm_size * 2; - ESP_LOGI(TAG, "OPUS encoding buffer too small, resizing to %d samples per channel", pcm_size/channels); - } - //ESP_LOGI(TAG, "Size in: %d -> %d,%d",size,frame_size, pcm_size); - if (frame_size < 0 ) - { ESP_LOGE(TAG, "Decode error : %d \n",frame_size); - } else - { - write_ringbuf(audio,frame_size*2*sizeof(uint16_t)); - } - wire_chunk_message_free(&wire_chunk_message); - break; - - case SNAPCAST_MESSAGE_SERVER_SETTINGS: - // The first 4 bytes in the buffer are the size of the string. - // We don't need this, so we'll shift the entire buffer over 4 bytes - // and use the extra room to add a null character so cJSON can pares it. - memmove(start, start + 4, size - 4); - start[size - 3] = '\0'; - result = server_settings_message_deserialize(&server_settings_message, start); - if (result) { - ESP_LOGI(TAG, "Failed to read server settings: %d\r\n", result); - return; - } - // log mute state, buffer, latency - buffer_ms = server_settings_message.buffer_ms; - ESP_LOGI(TAG, "Buffer length: %d", server_settings_message.buffer_ms); - ESP_LOGI(TAG, "Ringbuffer size:%d", server_settings_message.buffer_ms*48*4); - ESP_LOGI(TAG, "Latency: %d", server_settings_message.latency); - ESP_LOGI(TAG, "Mute: %d", server_settings_message.muted); - ESP_LOGI(TAG, "Setting volume: %d", server_settings_message.volume); - muteCH[0] = server_settings_message.muted; - muteCH[1] = server_settings_message.muted; - muteCH[2] = server_settings_message.muted; - muteCH[3] = server_settings_message.muted; - - // Volume setting using ADF HAL abstraction - audio_hal_set_volume(board_handle->audio_hal,server_settings_message.volume); - // move this implemntation to a Merus Audio hal - //uint8_t cmd[4]; - //cmd[0] = 128-server_settings_message.volume ; - //cmd[1] = cmd[0]; - //ma_write(0x20,1,0x0040,cmd,1); - break; - - case SNAPCAST_MESSAGE_TIME: - result = time_message_deserialize(&time_message, start, size); - if (result) { - ESP_LOGI(TAG, "Failed to deserialize time message\r\n"); - return; - } - //ESP_LOGI(TAG, "BaseTX : %d %d ", base_message.sent.sec , base_message.sent.usec); - //ESP_LOGI(TAG, "BaseRX : %d %d ", base_message.received.sec , base_message.received.usec); - //ESP_LOGI(TAG, "baseTX->RX : %d s ", (base_message.received.sec - base_message.sent.sec)/1000); - //ESP_LOGI(TAG, "baseTX->RX : %d ms ", (base_message.received.usec - base_message.sent.usec)/1000); - //ESP_LOGI(TAG, "Latency : %d.%d ", time_message.latency.sec, time_message.latency.usec/1000); - // tv == server to client latency (s2c) - // time_message.latency == client to server latency(c2s) - // TODO the fact that I have to do this simple conversion means - // I should probably use the timeval struct instead of my own - tv1.tv_sec = base_message.received.sec; - tv1.tv_usec = base_message.received.usec; - tv3.tv_sec = base_message.sent.sec; - tv3.tv_usec = base_message.sent.usec; - timersub(&tv1, &tv3, &tv2); - tv1.tv_sec = time_message.latency.sec; - tv1.tv_usec = time_message.latency.usec; - - // tv1 == c2s: client to server - // tv2 == s2c: server to client - //ESP_LOGI(TAG, "c2s: %ld %ld", tv1.tv_sec, tv1.tv_usec); - //ESP_LOGI(TAG, "s2c: %ld %ld", tv2.tv_sec, tv2.tv_usec); - time_diff = (((double)(tv1.tv_sec - tv2.tv_sec) / 2) * 1000) + (((double)(tv1.tv_usec - tv2.tv_usec) / 2) / 1000); - //ESP_LOGI(TAG, "Current latency: %fms\r\n", time_diff); - break; - } // If it's been a second or longer since our last time message was // sent, do so now result = gettimeofday(&now, NULL); @@ -528,6 +1001,8 @@ static void http_get_task(void *pvParameters) ESP_LOGI(TAG, "Failed to gettimeofday\r\n"); return; } + + // use time we got from before timersub(&now, &last_time_sync, &tv1); if (tv1.tv_sec >= 1) { last_time_sync.tv_sec = now.tv_sec; @@ -560,44 +1035,63 @@ static void http_get_task(void *pvParameters) write(sockfd, base_message_serialized, BASE_MESSAGE_SIZE); write(sockfd, buff, TIME_MESSAGE_SIZE); + + //ESP_LOGI(TAG, "sent time sync message"); } + + vTaskDelay( 1 / portTICK_PERIOD_MS ); } - ESP_LOGI(TAG, "... done reading from socket\r\n"); + + if (syncTask != NULL) { + vTaskDelete(syncTask); + syncTask = NULL; + } + + ESP_LOGI(TAG, "... closing socket\r\n"); close(sockfd); } } -static int sntp_synced = 0; + +/** + * + */ void sntp_sync_time(struct timeval *tv_ntp) { if ((sntp_synced%10) == 0) { - settimeofday(tv_ntp,NULL); + settimeofday(tv_ntp,NULL); sntp_synced++; ESP_LOGI(TAG,"SNTP time set from server number :%d",sntp_synced); - return; + return; } - sntp_synced++; + sntp_synced++; struct timeval tv_esp; gettimeofday(&tv_esp, NULL); //ESP_LOGI(TAG,"SNTP diff s: %ld , %ld ", tv_esp.tv_sec , tv_ntp->tv_sec); ESP_LOGI(TAG,"SNTP diff us: %ld , %ld ", tv_esp.tv_usec , tv_ntp->tv_usec); ESP_LOGI(TAG,"SNTP diff us: %.2f", (double)((tv_esp.tv_usec - tv_ntp->tv_usec)/1000.0)); - + } +/** + * + */ void sntp_cb(struct timeval *tv) { struct tm timeinfo = { 0 }; - time_t now = tv->tv_sec; + time_t now = tv->tv_sec; localtime_r(&now, &timeinfo); char strftime_buf[64]; strftime(strftime_buf, sizeof(strftime_buf), "%c", &timeinfo); - ESP_LOGI(TAG, "sntp_cb called :%s", strftime_buf); + ESP_LOGI(TAG, "sntp_cb called :%s", strftime_buf); } +/** + * + */ void set_time_from_sntp() { xEventGroupWaitBits(s_wifi_event_group, WIFI_CONNECTED_BIT, false, true, portMAX_DELAY); //ESP_LOGI(TAG, "clock %"); - + ESP_LOGI(TAG, "Initializing SNTP"); sntp_setoperatingmode(SNTP_OPMODE_POLL); sntp_setservername(0, "europe.pool.ntp.org"); @@ -606,7 +1100,8 @@ void set_time_from_sntp() { setenv("TZ", "UTC-2", 1); tzset(); - /*time_t now = 0; + /* + time_t now = 0; struct tm timeinfo = { 0 }; int retry = 0; const int retry_count = 10; @@ -617,56 +1112,196 @@ void set_time_from_sntp() { localtime_r(&now, &timeinfo); } char strftime_buf[64]; - + strftime(strftime_buf, sizeof(strftime_buf), "%c", &timeinfo); ESP_LOGI(TAG, "The current date/time in UTC is: %s", strftime_buf); - */ + */ } +/** + * + */ void app_main(void) { - esp_err_t ret = nvs_flash_init(); + audio_pipeline_handle_t pipeline; + audio_element_handle_t raw_stream_reader, i2s_stream_writer, decoder; + esp_err_t ret; + uint8_t base_mac[6]; + + ret = nvs_flash_init(); if (ret == ESP_ERR_NVS_NO_FREE_PAGES || ret == ESP_ERR_NVS_NEW_VERSION_FOUND) { ESP_ERROR_CHECK(nvs_flash_erase()); ret = nvs_flash_init(); } ESP_ERROR_CHECK(ret); - //setup_ma120(); - //ma120_setup_audio(0x20); - ESP_LOGI(TAG, "[ 2 ] Start codec chip"); - board_handle = audio_board_init(); - audio_hal_ctrl_codec(board_handle->audio_hal, AUDIO_HAL_CODEC_MODE_BOTH, AUDIO_HAL_CTRL_START); - i2s_mclk_gpio_select(0,0); - //audio_hal_set_volume(board_handle->audio_hal,40); - - //setup_ma120x0(); - //setup_rtp_i2s(); +// tcpip_adapter_init(); +// ESP_ERROR_CHECK( esp_event_loop_init(event_handler, NULL) ); +// wifi_init_config_t cfg = WIFI_INIT_CONFIG_DEFAULT(); +// ESP_ERROR_CHECK( esp_wifi_init(&cfg) ); +// ESP_ERROR_CHECK( esp_wifi_set_storage(WIFI_STORAGE_RAM) ); +// ESP_ERROR_CHECK( esp_wifi_set_mode(WIFI_MODE_STA) ); +// wifi_config_t sta_config = { +// .sta = { +// .ssid = CONFIG_ESP_WIFI_SSID, +// .password = CONFIG_ESP_WIFI_PASSWORD, +// .bssid_set = false +// } +// }; +// ESP_ERROR_CHECK( esp_wifi_set_config(WIFI_IF_STA, &sta_config) ); +// ESP_ERROR_CHECK( esp_wifi_start() ); +// ESP_ERROR_CHECK( esp_wifi_connect() ); wifi_init_sta(); - uint8_t base_mac[6]; - // Get MAC address for WiFi station - esp_read_mac(base_mac, ESP_MAC_WIFI_STA); - sprintf(mac_address, "%02X:%02X:%02X:%02X:%02X:%02X", base_mac[0], base_mac[1], base_mac[2], base_mac[3], base_mac[4], base_mac[5]); + // Get MAC address for WiFi station + esp_read_mac(base_mac, ESP_MAC_WIFI_STA); + sprintf(mac_address, "%02X:%02X:%02X:%02X:%02X:%02X", base_mac[0], base_mac[1], base_mac[2], base_mac[3], base_mac[4], base_mac[5]); + ESP_LOGI(TAG, "MAC Adress is: %s", mac_address); - vTaskDelay(5000/portTICK_PERIOD_MS); - printf("Settime from sntp\n"); - set_time_from_sntp(); - printf("Called\n"); + esp_log_level_set("*", ESP_LOG_WARN); + esp_log_level_set(TAG, ESP_LOG_INFO); + + ESP_LOGI(TAG, "[ 2 ] Start codec chip"); + board_handle = audio_board_init(); + audio_hal_ctrl_codec(board_handle->audio_hal, AUDIO_HAL_CODEC_MODE_DECODE, AUDIO_HAL_CTRL_START); + + ESP_LOGI(TAG, "[3.0] Create audio pipeline for playback"); + audio_pipeline_cfg_t pipeline_cfg = DEFAULT_AUDIO_PIPELINE_CONFIG(); + //pipeline_cfg.rb_size = 1024; + pipeline = audio_pipeline_init(&pipeline_cfg); + AUDIO_NULL_CHECK(TAG, pipeline, return); + + ESP_LOGI(TAG, "[3.1] Create raw stream to read data from snapcast"); + raw_stream_cfg_t raw_cfg = RAW_STREAM_CFG_DEFAULT(); + raw_cfg.type = AUDIO_STREAM_WRITER; + //raw_cfg.out_rb_size = 1024; + raw_stream_reader = raw_stream_init(&raw_cfg); + + ESP_LOGI(TAG, "[3.2] Create i2s stream to write data to codec chip"); + i2s_stream_cfg_t i2s_cfg = I2S_STREAM_CFG_DEFAULT(); + //i2s_cfg.task_stack = I2S_STREAM_TASK_STACK * 2; + i2s_cfg.i2s_config.sample_rate = 48000; + //i2s_cfg.i2s_config.dma_buf_count = 8; + //i2s_cfg.i2s_config.dma_buf_len = 480; + //i2s_cfg.out_rb_size = 1024; + i2s_cfg.task_core = I2S_TASK_CORE_ID; + i2s_cfg.task_prio = I2S_TASK_PRIORITY; + i2s_stream_writer = i2s_stream_init(&i2s_cfg); + + ESP_LOGI(TAG, "[2.1] Create flac decoder to decode flac file and set custom read callback"); + flac_decoder_cfg_t flac_cfg = DEFAULT_FLAC_DECODER_CONFIG(); + //flac_cfg.out_rb_size = 1024; + decoder = flac_decoder_init(&flac_cfg); + + ESP_LOGI(TAG, "[3.4] Register all elements to audio pipeline"); + audio_pipeline_register(pipeline, raw_stream_reader, "raw"); + audio_pipeline_register(pipeline, decoder, "decoder"); + audio_pipeline_register(pipeline, i2s_stream_writer, "i2s"); + + ESP_LOGI(TAG, "[3.5] Link it together [flash]-->raw-->decoder-->i2s_stream-->[codec_chip]"); + const char *link_tag[3] = {"raw", "decoder", "i2s"}; + audio_pipeline_link(pipeline, &link_tag[0], 3); + + ESP_LOGI(TAG, "[ 4 ] Set up event listener"); + audio_event_iface_cfg_t evt_cfg = AUDIO_EVENT_IFACE_DEFAULT_CFG(); + audio_event_iface_handle_t evt = audio_event_iface_init(&evt_cfg); + + ESP_LOGI(TAG, "[4.1] Listening event from all elements of pipeline"); + audio_pipeline_set_listener(pipeline, evt); + + ESP_LOGI(TAG, "[ 5 ] Start audio_pipeline"); + audio_pipeline_run(pipeline); + + ESP_LOGI(TAG, "[ 6 ] Listen for all pipeline events"); + + // syncing to sntp +#if CONFIG_USE_SNTP == 1 + vTaskDelay(5000/portTICK_PERIOD_MS); + ESP_LOGI(TAG, "[ 7 ] Syncing to sntp"); + set_time_from_sntp(); +#else + { + struct timeval tv = { + .tv_sec = 0, + .tv_usec = 0, + }; + char tmbuf[64], buf[128]; + struct tm *nowtm; + time_t nowtime; + + settimeofday(&tv, NULL); + + nowtime = tv.tv_sec; + nowtm = localtime(&nowtime); + strftime(tmbuf, sizeof(tmbuf), "%Y-%m-%d %H:%M:%S", nowtm); + sprintf(buf, "%s.%06ld", tmbuf, tv.tv_usec); + ESP_LOGI(TAG, "[ 7 ] Current time is %s", buf); + } +#endif + + ESP_LOGI(TAG, "[ 8 ] Start snapclient task"); + xTaskCreatePinnedToCore(&http_get_task, "http_get_task", 4*4096, &raw_stream_reader, HTTP_TASK_PRIORITY, NULL, HTTP_TASK_CORE_ID); - xTaskCreatePinnedToCore(&http_get_task, "http_get_task", 3*4096, NULL, 5, NULL, 0); while (1) { - //audio_event_iface_msg_t msg; - vTaskDelay(2000/portTICK_PERIOD_MS); - - esp_err_t ret = 0; //audio_event_iface_listen(evt, &msg, portMAX_DELAY); + audio_event_iface_msg_t msg; + esp_err_t ret = audio_event_iface_listen(evt, &msg, portMAX_DELAY); if (ret != ESP_OK) { ESP_LOGE(TAG, "[ * ] Event interface error : %d", ret); continue; } - } + if (msg.source_type == AUDIO_ELEMENT_TYPE_ELEMENT && msg.source == (void *) decoder + && msg.cmd == AEL_MSG_CMD_REPORT_MUSIC_INFO) { + audio_element_info_t music_info = {0}; + audio_element_getinfo(decoder, &music_info); + if (codecString != NULL) { + ESP_LOGI(TAG, "[ * ] Receive music info from %s decoder, sample_rates=%d, bits=%d, ch=%d", + codecString, music_info.sample_rates, music_info.bits, music_info.channels); + } + else { + ESP_LOGI(TAG, "[ * ] Receive music info from decoder, sample_rates=%d, bits=%d, ch=%d", + music_info.sample_rates, music_info.bits, music_info.channels); + } + + audio_element_setinfo(i2s_stream_writer, &music_info); + i2s_stream_set_clk(i2s_stream_writer, music_info.sample_rates, music_info.bits, music_info.channels); + continue; + } + + /* Stop when the last pipeline element (i2s_stream_writer in this case) receives stop event */ + if (msg.source_type == AUDIO_ELEMENT_TYPE_ELEMENT && msg.source == (void *) i2s_stream_writer + && msg.cmd == AEL_MSG_CMD_REPORT_STATUS + && (((int)msg.data == AEL_STATUS_STATE_STOPPED) || ((int)msg.data == AEL_STATUS_STATE_FINISHED))) { + ESP_LOGW(TAG, "[ * ] Stop event received"); + break; + } + } + + ESP_LOGI(TAG, "[ 7 ] Stop audio_pipeline"); + audio_pipeline_stop(pipeline); + audio_pipeline_wait_for_stop(pipeline); + audio_pipeline_terminate(pipeline); + + //audio_pipeline_unregister(pipeline, spiffs_stream_reader); + audio_pipeline_unregister(pipeline, raw_stream_reader); + audio_pipeline_unregister(pipeline, i2s_stream_writer); + audio_pipeline_unregister(pipeline, decoder); + + /* Terminal the pipeline before removing the listener */ + audio_pipeline_remove_listener(pipeline); + + /* Make sure audio_pipeline_remove_listener & audio_event_iface_remove_listener are called before destroying event_iface */ + audio_event_iface_destroy(evt); + + /* Release all resources */ + audio_pipeline_deinit(pipeline); + audio_element_deinit(raw_stream_reader); + audio_element_deinit(i2s_stream_writer); + audio_element_deinit(decoder); } + + + diff --git a/sdkconfig b/sdkconfig index a69bd09..ce33cf0 100644 --- a/sdkconfig +++ b/sdkconfig @@ -36,9 +36,9 @@ CONFIG_APP_RETRIEVE_LEN_ELF_SHA=16 # # Bootloader config # -CONFIG_BOOTLOADER_COMPILER_OPTIMIZATION_SIZE=y +# CONFIG_BOOTLOADER_COMPILER_OPTIMIZATION_SIZE is not set # CONFIG_BOOTLOADER_COMPILER_OPTIMIZATION_DEBUG is not set -# CONFIG_BOOTLOADER_COMPILER_OPTIMIZATION_PERF is not set +CONFIG_BOOTLOADER_COMPILER_OPTIMIZATION_PERF=y # CONFIG_BOOTLOADER_COMPILER_OPTIMIZATION_NONE is not set # CONFIG_BOOTLOADER_LOG_LEVEL_NONE is not set # CONFIG_BOOTLOADER_LOG_LEVEL_ERROR is not set @@ -83,11 +83,11 @@ CONFIG_ESPTOOLPY_FLASHFREQ_40M=y # CONFIG_ESPTOOLPY_FLASHFREQ_20M is not set CONFIG_ESPTOOLPY_FLASHFREQ="40m" # CONFIG_ESPTOOLPY_FLASHSIZE_1MB is not set -CONFIG_ESPTOOLPY_FLASHSIZE_2MB=y -# CONFIG_ESPTOOLPY_FLASHSIZE_4MB is not set +# CONFIG_ESPTOOLPY_FLASHSIZE_2MB is not set +CONFIG_ESPTOOLPY_FLASHSIZE_4MB=y # CONFIG_ESPTOOLPY_FLASHSIZE_8MB is not set # CONFIG_ESPTOOLPY_FLASHSIZE_16MB is not set -CONFIG_ESPTOOLPY_FLASHSIZE="2MB" +CONFIG_ESPTOOLPY_FLASHSIZE="4MB" CONFIG_ESPTOOLPY_FLASHSIZE_DETECT=y CONFIG_ESPTOOLPY_BEFORE_RESET=y # CONFIG_ESPTOOLPY_BEFORE_NORESET is not set @@ -119,30 +119,11 @@ CONFIG_PARTITION_TABLE_MD5=y # end of Partition Table # -# Merus MA120x0 interface Configuration +# Access Point configuration # -CONFIG_MA120X0_NENABLE_PIN=16 -CONFIG_MA120X0_NMUTE_PIN=2 -CONFIG_MA120X0_ENABLE_PIN=16 -CONFIG_MA120X0_NERR_PIN=21 -CONFIG_MA120X0_NCLIP_PIN=22 -CONFIG_MA120X0_SCL_PIN=0 -CONFIG_MA120X0_SDA_PIN=4 -CONFIG_MA120X0_I2C_ADDR=0x20 -# end of Merus MA120x0 interface Configuration - -# -# ESP32 audio buffer and I2S pin config -# -CONFIG_USE_PSRAM=y -CONFIG_BITS_PER_SAMPLE=16 -CONFIG_MASTER_I2S_BCK_PIN=5 -CONFIG_MASTER_I2S_LRCK_PIN=25 -CONFIG_MASTER_I2S_DATAOUT_PIN=26 -CONFIG_SLAVE_I2S_BCK_PIN=35 -CONFIG_SLAVE_I2S_LRCK_PIN=12 -CONFIG_SLAVE_I2S_DATAOUT_PIN=15 -# end of ESP32 audio buffer and I2S pin config +CONFIG_ESP_WIFI_SSID="" +CONFIG_ESP_WIFI_PASSWORD="" +# end of Access Point configuration # # Audio HAL @@ -181,9 +162,10 @@ CONFIG_SR_WN5_HILEXIN=y # CONFIG_SR_WN5X3_HIJESON is not set # CONFIG_SR_WN5X3_NIHAOXIAOXIN is not set # CONFIG_SR_WN5_CUSTOMIZED_WORD is not set -CONFIG_SR_MN1_MODEL_QUANT=y -CONFIG_SR_MN1_CHINESE=y -# CONFIG_SR_MN1_ENGLISH is not set +CONFIG_SINGLE_RECOGNITION=y +# CONFIG_CONTINUOUS_RECOGNITION is not set +CONFIG_SR_CHINESE=y +# CONFIG_SR_ENGLISH is not set CONFIG_SPEECH_COMMANDS_NUM=20 # @@ -199,9 +181,9 @@ CONFIG_CN_SPEECH_COMMAND_ID6="zhi re mo shi" CONFIG_CN_SPEECH_COMMAND_ID7="zhi leng mo shi" CONFIG_CN_SPEECH_COMMAND_ID8="song feng mo shi" CONFIG_CN_SPEECH_COMMAND_ID9="jie neng mo shi" -CONFIG_CN_SPEECH_COMMAND_ID10="guan bi jie neng mo shi" -CONFIG_CN_SPEECH_COMMAND_ID11="chu shi mo shi" -CONFIG_CN_SPEECH_COMMAND_ID12="guan bi chu shi mo shi" +CONFIG_CN_SPEECH_COMMAND_ID10="chu shi mo shi" +CONFIG_CN_SPEECH_COMMAND_ID11="jian kang mo shi" +CONFIG_CN_SPEECH_COMMAND_ID12="shui mian mo shi" CONFIG_CN_SPEECH_COMMAND_ID13="da kai lan ya" CONFIG_CN_SPEECH_COMMAND_ID14="guan bi lan ya" CONFIG_CN_SPEECH_COMMAND_ID15="bo fang ge qu" @@ -418,9 +400,9 @@ CONFIG_ESP32_REV_MIN_0=y CONFIG_ESP32_REV_MIN=0 CONFIG_ESP32_DPORT_WORKAROUND=y # CONFIG_ESP32_DEFAULT_CPU_FREQ_80 is not set -# CONFIG_ESP32_DEFAULT_CPU_FREQ_160 is not set -CONFIG_ESP32_DEFAULT_CPU_FREQ_240=y -CONFIG_ESP32_DEFAULT_CPU_FREQ_MHZ=240 +CONFIG_ESP32_DEFAULT_CPU_FREQ_160=y +# CONFIG_ESP32_DEFAULT_CPU_FREQ_240 is not set +CONFIG_ESP32_DEFAULT_CPU_FREQ_MHZ=160 CONFIG_ESP32_SPIRAM_SUPPORT=y # @@ -437,7 +419,7 @@ CONFIG_SPIRAM_BOOT_INIT=y # CONFIG_SPIRAM_USE_MEMMAP is not set # CONFIG_SPIRAM_USE_CAPS_ALLOC is not set CONFIG_SPIRAM_USE_MALLOC=y -CONFIG_SPIRAM_MEMTEST=y +# CONFIG_SPIRAM_MEMTEST is not set CONFIG_SPIRAM_MALLOC_ALWAYSINTERNAL=16384 # CONFIG_SPIRAM_TRY_ALLOCATE_WIFI_LWIP is not set CONFIG_SPIRAM_MALLOC_RESERVE_INTERNAL=32768 @@ -580,7 +562,7 @@ CONFIG_ETH_DMA_BUFFER_SIZE=512 CONFIG_ETH_DMA_RX_BUFFER_NUM=10 CONFIG_ETH_DMA_TX_BUFFER_NUM=10 CONFIG_ETH_USE_SPI_ETHERNET=y -# CONFIG_ETH_SPI_ETHERNET_DM9051 is not set +CONFIG_ETH_SPI_ETHERNET_DM9051=y # CONFIG_ETH_USE_OPENETH is not set # end of Ethernet @@ -724,8 +706,7 @@ CONFIG_FMB_SERIAL_BUF_SIZE=256 CONFIG_FMB_SERIAL_ASCII_BITS_PER_SYMB=8 CONFIG_FMB_SERIAL_ASCII_TIMEOUT_RESPOND_MS=1000 CONFIG_FMB_SERIAL_TASK_PRIO=10 -CONFIG_FMB_CONTROLLER_SLAVE_ID_SUPPORT=y -CONFIG_FMB_CONTROLLER_SLAVE_ID=0x00112233 +# CONFIG_FMB_CONTROLLER_SLAVE_ID_SUPPORT is not set CONFIG_FMB_CONTROLLER_NOTIFY_TIMEOUT=20 CONFIG_FMB_CONTROLLER_NOTIFY_QUEUE_SIZE=20 CONFIG_FMB_CONTROLLER_STACK_SIZE=4096 @@ -743,7 +724,7 @@ CONFIG_FMB_TIMER_INDEX=0 CONFIG_FREERTOS_NO_AFFINITY=0x7FFFFFFF CONFIG_FREERTOS_CORETIMER_0=y # CONFIG_FREERTOS_CORETIMER_1 is not set -CONFIG_FREERTOS_HZ=100 +CONFIG_FREERTOS_HZ=1000 CONFIG_FREERTOS_ASSERT_ON_UNTESTED_FUNCTION=y # CONFIG_FREERTOS_CHECK_STACKOVERFLOW_NONE is not set # CONFIG_FREERTOS_CHECK_STACKOVERFLOW_PTRVAL is not set @@ -860,7 +841,7 @@ CONFIG_LWIP_TCP_TMR_INTERVAL=250 CONFIG_LWIP_TCP_MSL=60000 CONFIG_LWIP_TCP_SND_BUF_DEFAULT=5744 CONFIG_LWIP_TCP_WND_DEFAULT=5744 -CONFIG_LWIP_TCP_RECVMBOX_SIZE=6 +CONFIG_LWIP_TCP_RECVMBOX_SIZE=10 CONFIG_LWIP_TCP_QUEUE_OOSEQ=y # CONFIG_LWIP_TCP_SACK_OUT is not set # CONFIG_LWIP_TCP_KEEP_CONNECTION_WHEN_IP_CHANGES is not set @@ -876,7 +857,7 @@ CONFIG_LWIP_MAX_UDP_PCBS=16 CONFIG_LWIP_UDP_RECVMBOX_SIZE=6 # end of UDP -CONFIG_LWIP_TCPIP_TASK_STACK_SIZE=3072 +CONFIG_LWIP_TCPIP_TASK_STACK_SIZE=6000 CONFIG_LWIP_TCPIP_TASK_AFFINITY_NO_AFFINITY=y # CONFIG_LWIP_TCPIP_TASK_AFFINITY_CPU0 is not set # CONFIG_LWIP_TCPIP_TASK_AFFINITY_CPU1 is not set @@ -1271,8 +1252,7 @@ CONFIG_MB_QUEUE_LENGTH=20 CONFIG_MB_SERIAL_TASK_STACK_SIZE=2048 CONFIG_MB_SERIAL_BUF_SIZE=256 CONFIG_MB_SERIAL_TASK_PRIO=10 -CONFIG_MB_CONTROLLER_SLAVE_ID_SUPPORT=y -CONFIG_MB_CONTROLLER_SLAVE_ID=0x00112233 +# CONFIG_MB_CONTROLLER_SLAVE_ID_SUPPORT is not set CONFIG_MB_CONTROLLER_NOTIFY_TIMEOUT=20 CONFIG_MB_CONTROLLER_NOTIFY_QUEUE_SIZE=20 CONFIG_MB_CONTROLLER_STACK_SIZE=4096 @@ -1296,14 +1276,14 @@ CONFIG_TCP_MSS=1440 CONFIG_TCP_MSL=60000 CONFIG_TCP_SND_BUF_DEFAULT=5744 CONFIG_TCP_WND_DEFAULT=5744 -CONFIG_TCP_RECVMBOX_SIZE=6 +CONFIG_TCP_RECVMBOX_SIZE=10 CONFIG_TCP_QUEUE_OOSEQ=y # CONFIG_ESP_TCP_KEEP_CONNECTION_WHEN_IP_CHANGES is not set CONFIG_TCP_OVERSIZE_MSS=y # CONFIG_TCP_OVERSIZE_QUARTER_MSS is not set # CONFIG_TCP_OVERSIZE_DISABLE is not set CONFIG_UDP_RECVMBOX_SIZE=6 -CONFIG_TCPIP_TASK_STACK_SIZE=3072 +CONFIG_TCPIP_TASK_STACK_SIZE=6000 CONFIG_TCPIP_TASK_AFFINITY_NO_AFFINITY=y # CONFIG_TCPIP_TASK_AFFINITY_CPU0 is not set # CONFIG_TCPIP_TASK_AFFINITY_CPU1 is not set diff --git a/sdkconfig.old b/sdkconfig.old index 2d9d3e1..4f0f79e 100644 --- a/sdkconfig.old +++ b/sdkconfig.old @@ -36,9 +36,9 @@ CONFIG_APP_RETRIEVE_LEN_ELF_SHA=16 # # Bootloader config # -CONFIG_BOOTLOADER_COMPILER_OPTIMIZATION_SIZE=y +# CONFIG_BOOTLOADER_COMPILER_OPTIMIZATION_SIZE is not set # CONFIG_BOOTLOADER_COMPILER_OPTIMIZATION_DEBUG is not set -# CONFIG_BOOTLOADER_COMPILER_OPTIMIZATION_PERF is not set +CONFIG_BOOTLOADER_COMPILER_OPTIMIZATION_PERF=y # CONFIG_BOOTLOADER_COMPILER_OPTIMIZATION_NONE is not set # CONFIG_BOOTLOADER_LOG_LEVEL_NONE is not set # CONFIG_BOOTLOADER_LOG_LEVEL_ERROR is not set @@ -83,11 +83,11 @@ CONFIG_ESPTOOLPY_FLASHFREQ_40M=y # CONFIG_ESPTOOLPY_FLASHFREQ_20M is not set CONFIG_ESPTOOLPY_FLASHFREQ="40m" # CONFIG_ESPTOOLPY_FLASHSIZE_1MB is not set -CONFIG_ESPTOOLPY_FLASHSIZE_2MB=y -# CONFIG_ESPTOOLPY_FLASHSIZE_4MB is not set +# CONFIG_ESPTOOLPY_FLASHSIZE_2MB is not set +CONFIG_ESPTOOLPY_FLASHSIZE_4MB=y # CONFIG_ESPTOOLPY_FLASHSIZE_8MB is not set # CONFIG_ESPTOOLPY_FLASHSIZE_16MB is not set -CONFIG_ESPTOOLPY_FLASHSIZE="2MB" +CONFIG_ESPTOOLPY_FLASHSIZE="4MB" CONFIG_ESPTOOLPY_FLASHSIZE_DETECT=y CONFIG_ESPTOOLPY_BEFORE_RESET=y # CONFIG_ESPTOOLPY_BEFORE_NORESET is not set @@ -119,30 +119,11 @@ CONFIG_PARTITION_TABLE_MD5=y # end of Partition Table # -# Merus MA120x0 interface Configuration +# Access Point configuration # -CONFIG_MA120X0_NENABLE_PIN=16 -CONFIG_MA120X0_NMUTE_PIN=2 -CONFIG_MA120X0_ENABLE_PIN=16 -CONFIG_MA120X0_NERR_PIN=21 -CONFIG_MA120X0_NCLIP_PIN=22 -CONFIG_MA120X0_SCL_PIN=0 -CONFIG_MA120X0_SDA_PIN=4 -CONFIG_MA120X0_I2C_ADDR=0x20 -# end of Merus MA120x0 interface Configuration - -# -# ESP32 audio buffer and I2S pin config -# -CONFIG_USE_PSRAM=y -CONFIG_BITS_PER_SAMPLE=32 -CONFIG_MASTER_I2S_BCK_PIN=23 -CONFIG_MASTER_I2S_LRCK_PIN=13 -CONFIG_MASTER_I2S_DATAOUT_PIN=14 -CONFIG_SLAVE_I2S_BCK_PIN=26 -CONFIG_SLAVE_I2S_LRCK_PIN=12 -CONFIG_SLAVE_I2S_DATAOUT_PIN=5 -# end of ESP32 audio buffer and I2S pin config +CONFIG_ESP_WIFI_SSID="zuhause" +CONFIG_ESP_WIFI_PASSWORD="dErtischlEr" +# end of Access Point configuration # # Audio HAL @@ -181,9 +162,10 @@ CONFIG_SR_WN5_HILEXIN=y # CONFIG_SR_WN5X3_HIJESON is not set # CONFIG_SR_WN5X3_NIHAOXIAOXIN is not set # CONFIG_SR_WN5_CUSTOMIZED_WORD is not set -CONFIG_SR_MN1_MODEL_QUANT=y -CONFIG_SR_MN1_CHINESE=y -# CONFIG_SR_MN1_ENGLISH is not set +CONFIG_SINGLE_RECOGNITION=y +# CONFIG_CONTINUOUS_RECOGNITION is not set +CONFIG_SR_CHINESE=y +# CONFIG_SR_ENGLISH is not set CONFIG_SPEECH_COMMANDS_NUM=20 # @@ -199,9 +181,9 @@ CONFIG_CN_SPEECH_COMMAND_ID6="zhi re mo shi" CONFIG_CN_SPEECH_COMMAND_ID7="zhi leng mo shi" CONFIG_CN_SPEECH_COMMAND_ID8="song feng mo shi" CONFIG_CN_SPEECH_COMMAND_ID9="jie neng mo shi" -CONFIG_CN_SPEECH_COMMAND_ID10="guan bi jie neng mo shi" -CONFIG_CN_SPEECH_COMMAND_ID11="chu shi mo shi" -CONFIG_CN_SPEECH_COMMAND_ID12="guan bi chu shi mo shi" +CONFIG_CN_SPEECH_COMMAND_ID10="chu shi mo shi" +CONFIG_CN_SPEECH_COMMAND_ID11="jian kang mo shi" +CONFIG_CN_SPEECH_COMMAND_ID12="shui mian mo shi" CONFIG_CN_SPEECH_COMMAND_ID13="da kai lan ya" CONFIG_CN_SPEECH_COMMAND_ID14="guan bi lan ya" CONFIG_CN_SPEECH_COMMAND_ID15="bo fang ge qu" @@ -418,9 +400,9 @@ CONFIG_ESP32_REV_MIN_0=y CONFIG_ESP32_REV_MIN=0 CONFIG_ESP32_DPORT_WORKAROUND=y # CONFIG_ESP32_DEFAULT_CPU_FREQ_80 is not set -# CONFIG_ESP32_DEFAULT_CPU_FREQ_160 is not set -CONFIG_ESP32_DEFAULT_CPU_FREQ_240=y -CONFIG_ESP32_DEFAULT_CPU_FREQ_MHZ=240 +CONFIG_ESP32_DEFAULT_CPU_FREQ_160=y +# CONFIG_ESP32_DEFAULT_CPU_FREQ_240 is not set +CONFIG_ESP32_DEFAULT_CPU_FREQ_MHZ=160 CONFIG_ESP32_SPIRAM_SUPPORT=y # @@ -580,7 +562,7 @@ CONFIG_ETH_DMA_BUFFER_SIZE=512 CONFIG_ETH_DMA_RX_BUFFER_NUM=10 CONFIG_ETH_DMA_TX_BUFFER_NUM=10 CONFIG_ETH_USE_SPI_ETHERNET=y -# CONFIG_ETH_SPI_ETHERNET_DM9051 is not set +CONFIG_ETH_SPI_ETHERNET_DM9051=y # CONFIG_ETH_USE_OPENETH is not set # end of Ethernet @@ -724,8 +706,7 @@ CONFIG_FMB_SERIAL_BUF_SIZE=256 CONFIG_FMB_SERIAL_ASCII_BITS_PER_SYMB=8 CONFIG_FMB_SERIAL_ASCII_TIMEOUT_RESPOND_MS=1000 CONFIG_FMB_SERIAL_TASK_PRIO=10 -CONFIG_FMB_CONTROLLER_SLAVE_ID_SUPPORT=y -CONFIG_FMB_CONTROLLER_SLAVE_ID=0x00112233 +# CONFIG_FMB_CONTROLLER_SLAVE_ID_SUPPORT is not set CONFIG_FMB_CONTROLLER_NOTIFY_TIMEOUT=20 CONFIG_FMB_CONTROLLER_NOTIFY_QUEUE_SIZE=20 CONFIG_FMB_CONTROLLER_STACK_SIZE=4096 @@ -743,7 +724,7 @@ CONFIG_FMB_TIMER_INDEX=0 CONFIG_FREERTOS_NO_AFFINITY=0x7FFFFFFF CONFIG_FREERTOS_CORETIMER_0=y # CONFIG_FREERTOS_CORETIMER_1 is not set -CONFIG_FREERTOS_HZ=100 +CONFIG_FREERTOS_HZ=1000 CONFIG_FREERTOS_ASSERT_ON_UNTESTED_FUNCTION=y # CONFIG_FREERTOS_CHECK_STACKOVERFLOW_NONE is not set # CONFIG_FREERTOS_CHECK_STACKOVERFLOW_PTRVAL is not set @@ -860,7 +841,7 @@ CONFIG_LWIP_TCP_TMR_INTERVAL=250 CONFIG_LWIP_TCP_MSL=60000 CONFIG_LWIP_TCP_SND_BUF_DEFAULT=5744 CONFIG_LWIP_TCP_WND_DEFAULT=5744 -CONFIG_LWIP_TCP_RECVMBOX_SIZE=6 +CONFIG_LWIP_TCP_RECVMBOX_SIZE=10 CONFIG_LWIP_TCP_QUEUE_OOSEQ=y # CONFIG_LWIP_TCP_SACK_OUT is not set # CONFIG_LWIP_TCP_KEEP_CONNECTION_WHEN_IP_CHANGES is not set @@ -876,7 +857,7 @@ CONFIG_LWIP_MAX_UDP_PCBS=16 CONFIG_LWIP_UDP_RECVMBOX_SIZE=6 # end of UDP -CONFIG_LWIP_TCPIP_TASK_STACK_SIZE=3072 +CONFIG_LWIP_TCPIP_TASK_STACK_SIZE=6000 CONFIG_LWIP_TCPIP_TASK_AFFINITY_NO_AFFINITY=y # CONFIG_LWIP_TCPIP_TASK_AFFINITY_CPU0 is not set # CONFIG_LWIP_TCPIP_TASK_AFFINITY_CPU1 is not set @@ -1173,3 +1154,152 @@ CONFIG_WPA_MBEDTLS_CRYPTO=y # # CONFIG_LEGACY_INCLUDE_COMMON_HEADERS is not set # end of Compatibility options + +# Deprecated options for backward compatibility +CONFIG_TOOLPREFIX="xtensa-esp32-elf-" +# CONFIG_LOG_BOOTLOADER_LEVEL_NONE is not set +# CONFIG_LOG_BOOTLOADER_LEVEL_ERROR is not set +# CONFIG_LOG_BOOTLOADER_LEVEL_WARN is not set +CONFIG_LOG_BOOTLOADER_LEVEL_INFO=y +# CONFIG_LOG_BOOTLOADER_LEVEL_DEBUG is not set +# CONFIG_LOG_BOOTLOADER_LEVEL_VERBOSE is not set +CONFIG_LOG_BOOTLOADER_LEVEL=3 +# CONFIG_APP_ROLLBACK_ENABLE is not set +# CONFIG_FLASH_ENCRYPTION_ENABLED is not set +# CONFIG_FLASHMODE_QIO is not set +# CONFIG_FLASHMODE_QOUT is not set +CONFIG_FLASHMODE_DIO=y +# CONFIG_FLASHMODE_DOUT is not set +# CONFIG_MONITOR_BAUD_9600B is not set +# CONFIG_MONITOR_BAUD_57600B is not set +CONFIG_MONITOR_BAUD_115200B=y +# CONFIG_MONITOR_BAUD_230400B is not set +# CONFIG_MONITOR_BAUD_921600B is not set +# CONFIG_MONITOR_BAUD_2MB is not set +# CONFIG_MONITOR_BAUD_OTHER is not set +CONFIG_MONITOR_BAUD_OTHER_VAL=115200 +CONFIG_MONITOR_BAUD=115200 +CONFIG_COMPILER_OPTIMIZATION_LEVEL_DEBUG=y +# CONFIG_COMPILER_OPTIMIZATION_LEVEL_RELEASE is not set +CONFIG_OPTIMIZATION_ASSERTIONS_ENABLED=y +# CONFIG_OPTIMIZATION_ASSERTIONS_SILENT is not set +# CONFIG_OPTIMIZATION_ASSERTIONS_DISABLED is not set +# CONFIG_CXX_EXCEPTIONS is not set +CONFIG_STACK_CHECK_NONE=y +# CONFIG_STACK_CHECK_NORM is not set +# CONFIG_STACK_CHECK_STRONG is not set +# CONFIG_STACK_CHECK_ALL is not set +# CONFIG_WARN_WRITE_STRINGS is not set +# CONFIG_DISABLE_GCC8_WARNINGS is not set +# CONFIG_ESP32_APPTRACE_DEST_TRAX is not set +CONFIG_ESP32_APPTRACE_DEST_NONE=y +CONFIG_ESP32_APPTRACE_LOCK_ENABLE=y +CONFIG_BTDM_CONTROLLER_BLE_MAX_CONN_EFF=0 +CONFIG_BTDM_CONTROLLER_BR_EDR_MAX_ACL_CONN_EFF=0 +CONFIG_BTDM_CONTROLLER_BR_EDR_MAX_SYNC_CONN_EFF=0 +CONFIG_BTDM_CONTROLLER_PINNED_TO_CORE=0 +CONFIG_ADC2_DISABLE_DAC=y +CONFIG_SPIRAM_SUPPORT=y +# CONFIG_WIFI_LWIP_ALLOCATION_FROM_SPIRAM_FIRST is not set +CONFIG_TRACEMEM_RESERVE_DRAM=0x0 +# CONFIG_TWO_UNIVERSAL_MAC_ADDRESS is not set +CONFIG_FOUR_UNIVERSAL_MAC_ADDRESS=y +CONFIG_NUMBER_OF_UNIVERSAL_MAC_ADDRESS=4 +# CONFIG_ULP_COPROC_ENABLED is not set +CONFIG_ULP_COPROC_RESERVE_MEM=0 +CONFIG_BROWNOUT_DET=y +CONFIG_BROWNOUT_DET_LVL_SEL_0=y +# CONFIG_BROWNOUT_DET_LVL_SEL_1 is not set +# CONFIG_BROWNOUT_DET_LVL_SEL_2 is not set +# CONFIG_BROWNOUT_DET_LVL_SEL_3 is not set +# CONFIG_BROWNOUT_DET_LVL_SEL_4 is not set +# CONFIG_BROWNOUT_DET_LVL_SEL_5 is not set +# CONFIG_BROWNOUT_DET_LVL_SEL_6 is not set +# CONFIG_BROWNOUT_DET_LVL_SEL_7 is not set +CONFIG_BROWNOUT_DET_LVL=0 +CONFIG_REDUCE_PHY_TX_POWER=y +CONFIG_ESP32_RTC_CLOCK_SOURCE_INTERNAL_RC=y +# CONFIG_ESP32_RTC_CLOCK_SOURCE_EXTERNAL_CRYSTAL is not set +# CONFIG_ESP32_RTC_CLOCK_SOURCE_EXTERNAL_OSC is not set +# CONFIG_ESP32_RTC_CLOCK_SOURCE_INTERNAL_8MD256 is not set +# CONFIG_DISABLE_BASIC_ROM_CONSOLE is not set +# CONFIG_NO_BLOBS is not set +# CONFIG_COMPATIBLE_PRE_V2_1_BOOTLOADERS is not set +CONFIG_SYSTEM_EVENT_QUEUE_SIZE=32 +CONFIG_SYSTEM_EVENT_TASK_STACK_SIZE=2304 +CONFIG_MAIN_TASK_STACK_SIZE=3584 +CONFIG_IPC_TASK_STACK_SIZE=1024 +CONFIG_TIMER_TASK_STACK_SIZE=3584 +CONFIG_CONSOLE_UART_DEFAULT=y +# CONFIG_CONSOLE_UART_CUSTOM is not set +# CONFIG_CONSOLE_UART_NONE is not set +CONFIG_CONSOLE_UART_NUM=0 +CONFIG_CONSOLE_UART_BAUDRATE=115200 +CONFIG_INT_WDT=y +CONFIG_INT_WDT_TIMEOUT_MS=300 +CONFIG_INT_WDT_CHECK_CPU1=y +CONFIG_TASK_WDT=y +# CONFIG_TASK_WDT_PANIC is not set +CONFIG_TASK_WDT_TIMEOUT_S=5 +CONFIG_TASK_WDT_CHECK_IDLE_TASK_CPU0=y +CONFIG_TASK_WDT_CHECK_IDLE_TASK_CPU1=y +# CONFIG_EVENT_LOOP_PROFILING is not set +CONFIG_POST_EVENTS_FROM_ISR=y +CONFIG_POST_EVENTS_FROM_IRAM_ISR=y +CONFIG_MB_MASTER_TIMEOUT_MS_RESPOND=150 +CONFIG_MB_MASTER_DELAY_MS_CONVERT=200 +CONFIG_MB_QUEUE_LENGTH=20 +CONFIG_MB_SERIAL_TASK_STACK_SIZE=2048 +CONFIG_MB_SERIAL_BUF_SIZE=256 +CONFIG_MB_SERIAL_TASK_PRIO=10 +# CONFIG_MB_CONTROLLER_SLAVE_ID_SUPPORT is not set +CONFIG_MB_CONTROLLER_NOTIFY_TIMEOUT=20 +CONFIG_MB_CONTROLLER_NOTIFY_QUEUE_SIZE=20 +CONFIG_MB_CONTROLLER_STACK_SIZE=4096 +CONFIG_MB_EVENT_QUEUE_TIMEOUT=20 +CONFIG_MB_TIMER_PORT_ENABLED=y +CONFIG_MB_TIMER_GROUP=0 +CONFIG_MB_TIMER_INDEX=0 +CONFIG_SUPPORT_STATIC_ALLOCATION=y +# CONFIG_ENABLE_STATIC_TASK_CLEAN_UP_HOOK is not set +CONFIG_TIMER_TASK_PRIORITY=1 +CONFIG_TIMER_TASK_STACK_DEPTH=2048 +CONFIG_TIMER_QUEUE_LENGTH=10 +# CONFIG_L2_TO_L3_COPY is not set +# CONFIG_USE_ONLY_LWIP_SELECT is not set +CONFIG_ESP_GRATUITOUS_ARP=y +CONFIG_GARP_TMR_INTERVAL=60 +CONFIG_TCPIP_RECVMBOX_SIZE=32 +CONFIG_TCP_MAXRTX=12 +CONFIG_TCP_SYNMAXRTX=6 +CONFIG_TCP_MSS=1440 +CONFIG_TCP_MSL=60000 +CONFIG_TCP_SND_BUF_DEFAULT=5744 +CONFIG_TCP_WND_DEFAULT=5744 +CONFIG_TCP_RECVMBOX_SIZE=10 +CONFIG_TCP_QUEUE_OOSEQ=y +# CONFIG_ESP_TCP_KEEP_CONNECTION_WHEN_IP_CHANGES is not set +CONFIG_TCP_OVERSIZE_MSS=y +# CONFIG_TCP_OVERSIZE_QUARTER_MSS is not set +# CONFIG_TCP_OVERSIZE_DISABLE is not set +CONFIG_UDP_RECVMBOX_SIZE=6 +CONFIG_TCPIP_TASK_STACK_SIZE=6000 +CONFIG_TCPIP_TASK_AFFINITY_NO_AFFINITY=y +# CONFIG_TCPIP_TASK_AFFINITY_CPU0 is not set +# CONFIG_TCPIP_TASK_AFFINITY_CPU1 is not set +CONFIG_TCPIP_TASK_AFFINITY=0x7FFFFFFF +# CONFIG_PPP_SUPPORT is not set +CONFIG_ESP32_PTHREAD_TASK_PRIO_DEFAULT=5 +CONFIG_ESP32_PTHREAD_TASK_STACK_SIZE_DEFAULT=3072 +CONFIG_ESP32_PTHREAD_STACK_MIN=768 +CONFIG_ESP32_DEFAULT_PTHREAD_CORE_NO_AFFINITY=y +# CONFIG_ESP32_DEFAULT_PTHREAD_CORE_0 is not set +# CONFIG_ESP32_DEFAULT_PTHREAD_CORE_1 is not set +CONFIG_ESP32_PTHREAD_TASK_CORE_DEFAULT=-1 +CONFIG_ESP32_PTHREAD_TASK_NAME_DEFAULT="pthread" +CONFIG_SPI_FLASH_WRITING_DANGEROUS_REGIONS_ABORTS=y +# CONFIG_SPI_FLASH_WRITING_DANGEROUS_REGIONS_FAILS is not set +# CONFIG_SPI_FLASH_WRITING_DANGEROUS_REGIONS_ALLOWED is not set +CONFIG_SUPPRESS_SELECT_DEBUG_OUTPUT=y +CONFIG_SUPPORT_TERMIOS=y +# End of deprecated options