15b4baba28
- minimize RAM usage of all components - use both IRAM and DRAM in player component so we can buffer up to 1s on modules without SPI RAM - support fragemented pcm chunks so we can use all available RAM if there isn't a big enough block available but still enough HEAP - reinclude all components from jorgen's master branch - add custom i2s driver to get a precise timing of initial sync - change wrong usage of esp_timer for latency measurement of snapcast protocol - add player component
95 lines
2.9 KiB
ArmAsm
95 lines
2.9 KiB
ArmAsm
// Copyright 2018-2019 Espressif Systems (Shanghai) PTE LTD
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//
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// Licensed under the Apache License, Version 2.0 (the "License");
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// you may not use this file except in compliance with the License.
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// You may obtain a copy of the License at
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//
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// http://www.apache.org/licenses/LICENSE-2.0
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//
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// Unless required by applicable law or agreed to in writing, software
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// distributed under the License is distributed on an "AS IS" BASIS,
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// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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// See the License for the specific language governing permissions and
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// limitations under the License.
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#include "dsps_fir_platform.h"
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#if (dsps_fir_f32_ae32_enabled == 1)
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#include "dsps_dotprod_f32_m_ae32.S"
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// This is FIR filter for ESP32 processor.
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.text
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.align 4
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.global dsps_fir_f32_ae32
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.type dsps_fir_f32_ae32,@function
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// The function implements the following C code:
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//esp_err_t dsps_fir_f32_ae32(fir_f32_t* fir, const float* input, float* output, int len);
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dsps_fir_f32_ae32:
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// fir - a2
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// input - a3
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// output - a4
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// len - a5
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entry a1, 16
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// Array increment for floating point data should be 4
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l32i a7, a2, 12 // a7 - pos
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movi a10, 4
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mull a13, a7, a10// a13 - a7*4
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l32i a6, a2, 8 // a6 - N
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mull a6, a6, a10// a6 = a6*4
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l32i a10, a2, 0 // a10 - coeffs
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add a10, a10, a6 // a10 = &coeffs[N];
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addi a10, a10, -4 // a10 = &coeffs[N-1];
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l32i a11, a2, 4 // a11 - delay line
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l32i a6, a2, 8 // a6 - N
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movi.n a9, 0
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// a13 - delay index
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fir_loop_len:
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// Store to delay line
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lsi f0, a3, 0 // f0 = x[i]
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addi a3, a3, 4 // x++
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ssx f0, a11, a13 // delay[a13] = f0;
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addi a13, a13, 4 // a13++
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addi a7, a7, 1 // a7++
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// verify deley line
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blt a7, a6, do_not_reset_a13
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movi a13, 0
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movi a7, 0
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do_not_reset_a13:
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// Calc amount for delay line before end
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mov a15, a10 // a15 - coeffs
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wfr f2, a9 // f2 = 0;
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sub a14, a6, a7 // a14 = N-pos
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loopnez a14, first_fir_loop // pos...N-1
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lsi f1, a15, 0
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addi a15, a15, -4 // a15--
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lsx f0, a11, a13 // load delay f0 = delay[pos]
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addi a13, a13, 4 // a13++, pos++
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madd.s f2, f0, f1 // f2 += f0*f1
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first_fir_loop:
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movi a13, 0 // load delay line counter to 0
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loopnez a7, second_fir_loop // 0..pos
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lsi f1, a15, 0
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addi a15, a15, -4 // a15--
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lsx f0, a11, a13 // load delay f0 = delay[pos]
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addi a13, a13, 4 // a13++, pos++
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madd.s f2, f0, f1 // f2 += f0*f1
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second_fir_loop:
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// and after end
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// Store result
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ssi f2, a4, 0
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//s32i a13, a4, 0// just for debug *a4 = a13
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addi a4, a4, 4 // y++ - increment output pointer
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// Check loop
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addi a5, a5, -1
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bnez a5, fir_loop_len
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// store state
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s32i a7, a2, 12 // pos = a7
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movi.n a2, 0 // return status ESP_OK
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retw.n
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#endif // dsps_fir_f32_ae32_enabled |